Detail publikačního výsledku

Simulaton of Digital Clock and Data Recovery of Strongly Disturbed Signals

KUBÍČEK, M.

Originální název

Simulaton of Digital Clock and Data Recovery of Strongly Disturbed Signals

Anglický název

Simulaton of Digital Clock and Data Recovery of Strongly Disturbed Signals

Druh

Stať ve sborníku v databázi WoS či Scopus

Originální abstrakt

The paper describes a simulation model of a software and hardware recovery circuit. Performance of both models is compared and drawbacks of software recovery are discussed. To model different link conditions, signal source and data path models were created (to model jitter and noise of received signal). All simulations were performed in the Mentor Graphic's SystemVision 4.4 environment using VHDL-AMS models of signal source, data path and recovery circuits. The software recovery algorithm is written in synthesizable subset of VHDL and can be directly used as a part of an FPGA design.

Anglický abstrakt

The paper describes a simulation model of a software and hardware recovery circuit. Performance of both models is compared and drawbacks of software recovery are discussed. To model different link conditions, signal source and data path models were created (to model jitter and noise of received signal). All simulations were performed in the Mentor Graphic's SystemVision 4.4 environment using VHDL-AMS models of signal source, data path and recovery circuits. The software recovery algorithm is written in synthesizable subset of VHDL and can be directly used as a part of an FPGA design.

Klíčová slova

Simulation, Software data recovery, VHDL-AMS

Klíčová slova v angličtině

Simulation, Software data recovery, VHDL-AMS

Autoři

KUBÍČEK, M.

Vydáno

01.01.2007

Nakladatel

MJ servicsBožetěchova 133, 612 00 Brno, Czech Republic

Místo

Department of Radio Electronics, Brno University of TechnologyPurkyňova 118, 612 00 Brno, Czech Republic

ISBN

978-1-4244-0821-4

Kniha

Proceedings of 17th International Conference Radioelektronika 2007

Strany od

211

Strany do

214

Strany počet

4

Plný text v Digitální knihovně

http://hdl.handle.net/

BibTex

@inproceedings{BUT22609,
  author="Michal {Kubíček}",
  title="Simulaton of Digital Clock and Data Recovery of Strongly Disturbed Signals",
  booktitle="Proceedings of 17th International Conference Radioelektronika 2007",
  year="2007",
  pages="211--214",
  publisher="MJ servicsBožetěchova 133, 612 00 Brno, Czech Republic",
  address="Department of Radio Electronics, Brno University of TechnologyPurkyňova 118, 612 00 Brno, Czech Republic",
  isbn="978-1-4244-0821-4"
}