Polymorphic Gates in Design and Test of Digital Circuits

Polymorphic Gates in Design and Test of Digital Circuits

Článek recenzovaný mimo WoS a Scopus

Polymorphic gates are unconventional logic components which can switch their logic functions according to changing environment. The first part of this study presents an evolutionary approach to the design of polymorphic modules which exhibit different logic functions in different environments. The most complicated circuit that we evolved contains more than 100 gates. The second part of this study shows how to reduce the number of test vectors of a digital circuit by replacing some of its gates by polymorphic gates. In the first polymorphic mode, the circuit implements the original function. When switched to the second polymorphic mode, it can be tested using fewer test vectors than in the first polymorphic mode; however, the same fault coverage is obtained. The number of test vectors was reduced on 50-91% of its original volume for six benchmark circuits. The paper also discusses various obstacles which one has to deal with during a practical utilization of polymorphic gates.

Polymorphic gates are unconventional logic components which can switch their logic functions according to changing environment. The first part of this study presents an evolutionary approach to the design of polymorphic modules which exhibit different logic functions in different environments. The most complicated circuit that we evolved contains more than 100 gates. The second part of this study shows how to reduce the number of test vectors of a digital circuit by replacing some of its gates by polymorphic gates. In the first polymorphic mode, the circuit implements the original function. When switched to the second polymorphic mode, it can be tested using fewer test vectors than in the first polymorphic mode; however, the same fault coverage is obtained. The number of test vectors was reduced on 50-91% of its original volume for six benchmark circuits. The paper also discusses various obstacles which one has to deal with during a practical utilization of polymorphic gates.

digital circuit, polymorphic gate, test, adaptation, evolutionary algorithm

digital circuit, polymorphic gate, test, adaptation, evolutionary algorithm

SEKANINA, L.; STAREČEK, L.; KOTÁSEK, Z.; GAJDA, Z.

2010

21.03.2008

1548-7199

International Journal of Unconventional Computing

4

2

Spojené státy americké

125

142

18

https://www.fit.vut.cz/research/publication/8587/

http://hdl.handle.net/

ijuc08