Detail publikačního výsledku

Design of a 10-b Pipelined ADC without calibration

KLEDROWETZ, V.; HÁZE, J.

Originální název

Design of a 10-b Pipelined ADC without calibration

Anglický název

Design of a 10-b Pipelined ADC without calibration

Druh

Stať ve sborníku v databázi WoS či Scopus

Originální abstrakt

This paper describes the design of a 10-b fully differential pipelined analog-to-digital converter (ADC). The pipelined ADC has been designed using the switched-opamp technique without calibration in a 0.7 um CMOS process for sensor applications. Low power consumption is one of the most important issues. An operational amplifier (opamp) sharing technique was used to decrease the power usage.

Anglický abstrakt

This paper describes the design of a 10-b fully differential pipelined analog-to-digital converter (ADC). The pipelined ADC has been designed using the switched-opamp technique without calibration in a 0.7 um CMOS process for sensor applications. Low power consumption is one of the most important issues. An operational amplifier (opamp) sharing technique was used to decrease the power usage.

Klíčová slova

Pipelined ADC, MDAC, SC technique, operational amplifier, comparator, opamp sharing technique

Klíčová slova v angličtině

Pipelined ADC, MDAC, SC technique, operational amplifier, comparator, opamp sharing technique

Autoři

KLEDROWETZ, V.; HÁZE, J.

Rok RIV

2012

Vydáno

10.12.2011

Nakladatel

WSEAS Press

Místo

Tenerife, Španělsko

ISBN

978-1-61804-056-5

Kniha

Recent Researches in Circuits, Systems, Communications & Computers

Strany od

329

Strany do

332

Strany počet

4

BibTex

@inproceedings{BUT75541,
  author="Vilém {Kledrowetz} and Jiří {Háze}",
  title="Design of a 10-b Pipelined ADC without calibration",
  booktitle="Recent Researches in Circuits, Systems, Communications & Computers",
  year="2011",
  pages="329--332",
  publisher="WSEAS Press",
  address="Tenerife, Španělsko",
  isbn="978-1-61804-056-5"
}