Detail publikace

Asynchronous Microcontroller Simulation Model in VHDL

KOVÁČ, M.

Originální název

Asynchronous Microcontroller Simulation Model in VHDL

Typ

článek v časopise - ostatní, Jost

Jazyk

angličtina

Originální abstrakt

This article describes design of the 8-bit asynchronous microcontroller simulation model in VHDL. The model is created in ISE Foundation design tool and simulated in Modelsim tool. This model is a simple application example of asynchronous systems designed in synchronous design tools. The design process of creating asynchronous system with 4-phase bundled-data protocol and with matching delays is described in the article. The model is described in gate-level abstraction. The simulation waveform of the functional construction is the result of this article. Described construction covers only the simulation model. The next step would be creating synthesizable model to FPGA.

Klíčová slova

Asynchronous, Microcontroller, VHDL, FPGA

Autoři

KOVÁČ, M.

Rok RIV

2008

Vydáno

21. 11. 2008

Místo

Laval, France

ISSN

2070-3740

Periodikum

PROCEEDINGS OF WORLD ACADEMY OF SCIENCE, ENGINEERING AND TECHNOLOGY

Ročník

35

Číslo

11

Stát

Francouzská republika

Strany od

183

Strany do

187

Strany počet

4

BibTex

@article{BUT46782,
  author="Michal {Kováč}",
  title="Asynchronous Microcontroller Simulation Model in VHDL",
  journal="PROCEEDINGS OF  WORLD ACADEMY OF SCIENCE, ENGINEERING AND TECHNOLOGY",
  year="2008",
  volume="35",
  number="11",
  pages="183--187",
  issn="2070-3740"
}