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Detail publikačního výsledku
DVOŘÁK, V.
Originální název
LUT Cascade-Based Architectures for High Productivity Embedded Systems
Anglický název
Druh
Článek recenzovaný mimo WoS a Scopus
Originální abstrakt
Fast, flexible, cheap in hardware or low-power implementations of multiple-output Boolean functions are often required in embedded systems. The paper describes digital system architectures which embody some of these attributes. They are based on already known, and recently reinvented, representation of combinational logic by Look-Up Table (LUT) cascades. Theoretical background of cascade decomposition is revised and a relation to decision diagrams is pinpointed. The design of LUT cascades is discussed and a heuristic method of cascade synthesis is given. Three possible applications of LUT cascades are presented: combinational logic pipelines, efficient micro-programs with multi-way branching and fast logic simulation in software. It is shown that LUT cascades are quite flexible in making trade-offs between performance and cost by adjusting cascade length, complexity of its cells and multiplicity of cascades. The method of LUT cascades may be quite useful not only for high performance pipelined stream processing or embedded microprocessor or microcontroller firmware, but also in digital system simulation.
Anglický abstrakt
Klíčová slova
LUT cascades, binary decision diagrams BDD, MTBDD, iterative disjunctive decomposition, multi-way branching
Klíčová slova v angličtině
Autoři
Vydáno
29.08.2007
ISSN
1828-600X
Svazek
2
Číslo
4
Strany od
357
Strany do
365
Strany počet
9
URL
https://www.fit.vut.cz/research/publication/8404/
BibTex
@article{BUT45164, author="Václav {Dvořák}", title="LUT Cascade-Based Architectures for High Productivity Embedded Systems", year="2007", volume="2", number="4", pages="357--365", url="https://www.fit.vut.cz/research/publication/8404/" }
Dokumenty
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