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Detail publikačního výsledku
PUŠ, V.
Originální název
Fast Packet Classification Algorithm in Hardware
Anglický název
Druh
Stať ve sborníku mimo WoS a Scopus
Originální abstrakt
Packet classification is an important operation for applications such asrouters, firewalls or intrusion detection systems. Many algorithms andhardware architectures for packet classification have been created, butnone of them can compete with the speed of TCAMs in the worst case. I propose newhardware-based algorithm for packet classification. The solution is basedon problem decomposition and is aimed at the highest network speeds. A uniqueproperty of the algorithm is the constant time complexity in terms ofexternal memory accesses. The algorithm performs exactly two externalmemory accesses to classify a packet. Using FPGA and one commodity SRAMchip, a throughput of 150 million packets per second can be achieved.
Anglický abstrakt
Klíčová slova
Packet classification, hardware
Klíčová slova v angličtině
Autoři
Rok RIV
2010
Vydáno
01.12.2008
Místo
Vídeň
ISBN
978-3-200-01612-5
Kniha
Junior Scientist Conference 2008
Strany od
65
Strany do
66
Strany počet
2
BibTex
@inproceedings{BUT33439, author="Viktor {Puš}", title="Fast Packet Classification Algorithm in Hardware", booktitle="Junior Scientist Conference 2008", year="2008", pages="65--66", address="Vídeň", isbn="978-3-200-01612-5" }