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ŠKARVADA, J.; HERRMAN, T.; KOTÁSEK, Z.
Originální název
Testability Analysis Based on the Identification of Testable Blocks with Predefined Properties
Anglický název
Druh
Stať ve sborníku mimo WoS a Scopus
Originální abstrakt
In the paper, the methodology of testability analysis based on the concept of testable blocks is presented. In the methodology the power consumption during test application is also taken into account. For this purpose, power estimation tool was developed and implemented. Integration of the developed software into the Mentor Graphics design flow is described. Experimental results gained as a consequence of applying the methodology on both benchmark and practical designs are demonstrated. The intensions for future research are presented.
Anglický abstrakt
Klíčová slova
Testable block, power consumption estimation, test vectors generation, power consumption optimization
Klíčová slova v angličtině
Autoři
Vydáno
29.08.2007
Nakladatel
IEEE Computer Society
Místo
Lübeck
ISBN
0-7695-2978-X
Kniha
10th EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN Architectures, Methods and Tools (DSD 2007)
Strany od
611
Strany do
618
Strany počet
8
URL
https://www.fit.vut.cz/research/publication/8414/
BibTex
@inproceedings{BUT28825, author="Jaroslav {Škarvada} and Tomáš {Herrman} and Zdeněk {Kotásek}", title="Testability Analysis Based on the Identification of Testable Blocks with Predefined Properties", booktitle="10th EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN Architectures, Methods and Tools (DSD 2007)", year="2007", pages="611--618", publisher="IEEE Computer Society", address="Lübeck", isbn="0-7695-2978-X", url="https://www.fit.vut.cz/research/publication/8414/" }
Dokumenty
dsd07