Detail publikačního výsledku

The New Low Power 10-bit Pipelined ADC Using Novel Background Calibration Technique

HÁZE, J.; VRBA, R.

Originální název

The New Low Power 10-bit Pipelined ADC Using Novel Background Calibration Technique

Anglický název

The New Low Power 10-bit Pipelined ADC Using Novel Background Calibration Technique

Druh

Stať ve sborníku v databázi WoS či Scopus

Originální abstrakt

The paper deals with new background calibration technique, which is utilized in new 10-bit low power pipelined ADC. The switched-capacitor approach is used in designed ADC as well. Since portable applications demand for low power consumption, it is one of the most important issues considered in the design. A modified operational-amplifier (op-amp) sharing technique was used to decrease the power usage as well as capacitor scaling approach. To avoid the clock feedthrough from digital part through the switches, the fully differential circuitry was utilized. The operational transkonductance amplifier (OTA) was used in design instead of op-amp. The power consumption of the OTA and other analog parts were taken into account in design procedure. The finite op-amp dc gain problem is solved in digital-domain using background calibration. The capacitor mismatch and op-amp offset are compensated in the same manner.

Anglický abstrakt

The paper deals with new background calibration technique, which is utilized in new 10-bit low power pipelined ADC. The switched-capacitor approach is used in designed ADC as well. Since portable applications demand for low power consumption, it is one of the most important issues considered in the design. A modified operational-amplifier (op-amp) sharing technique was used to decrease the power usage as well as capacitor scaling approach. To avoid the clock feedthrough from digital part through the switches, the fully differential circuitry was utilized. The operational transkonductance amplifier (OTA) was used in design instead of op-amp. The power consumption of the OTA and other analog parts were taken into account in design procedure. The finite op-amp dc gain problem is solved in digital-domain using background calibration. The capacitor mismatch and op-amp offset are compensated in the same manner.

Klíčová slova

Pipelined ADC, switched-capacitors, background calibration, portable devices

Klíčová slova v angličtině

Pipelined ADC, switched-capacitors, background calibration, portable devices

Autoři

HÁZE, J.; VRBA, R.

Vydáno

01.01.2006

Nakladatel

IEEE Computer Society

Místo

Kuala Lumpur, Malaysia

ISBN

0-7695-2500-8

Kniha

Third IEEE International Workshop on Electronic Design, Test and Applications

Strany od

340

Strany počet

5

BibTex

@inproceedings{BUT21206,
  author="Jiří {Háze} and Radimír {Vrba}",
  title="The New Low Power 10-bit Pipelined ADC Using Novel Background Calibration Technique",
  booktitle="Third IEEE International Workshop on Electronic Design, Test and Applications",
  year="2006",
  number="1",
  pages="5",
  publisher="IEEE Computer Society",
  address="Kuala Lumpur, Malaysia",
  isbn="0-7695-2500-8"
}