Detail publikačního výsledku

Design of Fractional-Order Integrator Controlled by Single Voltage Gain

ŠOTNER, R.; PETRŽELA, J.; JEŘÁBEK, J.; HERENCSÁR, N.; ANDRIUKAITIS, D.

Originální název

Design of Fractional-Order Integrator Controlled by Single Voltage Gain

Anglický název

Design of Fractional-Order Integrator Controlled by Single Voltage Gain

Druh

Stať ve sborníku v databázi WoS či Scopus

Originální abstrakt

This work presents analyses of interaction of fractional- and integer-order transfer functions when their responses are added together by simple linear operation of sum. The mathematical background is very complex but practical consequences may be very useful for further design of electronically reconfigurable circuits including modification of shape of the resulting magnitude and phase responses. Described approach allows control of constant phase shift in limited operational bandwidth by single parameter that is documented by PSpice simulations with models of common of-the-shelf active elements.

Anglický abstrakt

This work presents analyses of interaction of fractional- and integer-order transfer functions when their responses are added together by simple linear operation of sum. The mathematical background is very complex but practical consequences may be very useful for further design of electronically reconfigurable circuits including modification of shape of the resulting magnitude and phase responses. Described approach allows control of constant phase shift in limited operational bandwidth by single parameter that is documented by PSpice simulations with models of common of-the-shelf active elements.

Klíčová slova

Constant phase element; fractional-order; integer-order; linear operation; phase shift control; transfer response.

Klíčová slova v angličtině

Constant phase element; fractional-order; integer-order; linear operation; phase shift control; transfer response.

Autoři

ŠOTNER, R.; PETRŽELA, J.; JEŘÁBEK, J.; HERENCSÁR, N.; ANDRIUKAITIS, D.

Rok RIV

2020

Vydáno

01.07.2019

Nakladatel

IEEE

Místo

Budapest, Hungary

ISBN

978-1-7281-1864-2

Kniha

Proceedings of the 2019 42nd International Conference on Telecommunications and Signal Processing (TSP), Budapest, Hungary

Strany od

360

Strany do

364

Strany počet

5

URL

https://ieeexplore.ieee.org/document/8768814

Plný text v Digitální knihovně

http://hdl.handle.net/11012/180512

BibTex

@inproceedings{BUT157693,
  author="Roman {Šotner} and Jiří {Petržela} and Jan {Jeřábek} and Norbert {Herencsár} and Darius {Andriukaitis}",
  title="Design of Fractional-Order Integrator Controlled by Single Voltage Gain",
  booktitle="Proceedings of the 2019 42nd International Conference on Telecommunications and Signal Processing (TSP), Budapest, Hungary",
  year="2019",
  pages="360--364",
  publisher="IEEE",
  address="Budapest, Hungary",
  doi="10.1109/TSP.2019.8768814",
  isbn="978-1-7281-1864-2",
  url="https://ieeexplore.ieee.org/document/8768814"
}

Dokumenty

paper_v9-final
fractional-order_vut