Detail publikačního výsledku

A compact power-efficient 0.5V Fully Differential Difference Amplifier

KHATEB, F.; KULEJ, T.; KUMNGERN, M.; PSYCHALINOS, C.

Originální název

A compact power-efficient 0.5V Fully Differential Difference Amplifier

Anglický název

A compact power-efficient 0.5V Fully Differential Difference Amplifier

Druh

Článek WoS

Originální abstrakt

This brief presents a novel compact CMOS Fully Differential Difference Amplifier (FDDA) structure suitable for extremely low-voltage low-power applications. Unlike the conventional FB-DDAs that employ two differential pairs, the proposed structure employs one differential pair of multiple-input bulk-driven MOS transistor (MI-BD MOST) that results in reduced count of current branches and, consequently, of power consumption. The proposed FDDA has the simplest CMOS structure presented in the literature so far. Furthermore, while the voltage supply is 0.5V and the power consumption is 246.6nW the circuit enjoys rail-to-rail input common mode range (ICMR), high common mode rejection ratio (CMRR) of 100.3 dB @ DC, power supply rejection ratio (PSRR) of 127.8 dB@ DC, voltage gain of 61.4 dB and gain bandwidth product of 6.98 kHz for 30 pF capacitive load. The total harmonic distortion (THD) is less than 0.08% for 500mV/1kHz input sine wave signal. The circuit was designed and simulated in Cadence/Spectre environment using 0.18 µm CMOS process from TSMC.

Anglický abstrakt

This brief presents a novel compact CMOS Fully Differential Difference Amplifier (FDDA) structure suitable for extremely low-voltage low-power applications. Unlike the conventional FB-DDAs that employ two differential pairs, the proposed structure employs one differential pair of multiple-input bulk-driven MOS transistor (MI-BD MOST) that results in reduced count of current branches and, consequently, of power consumption. The proposed FDDA has the simplest CMOS structure presented in the literature so far. Furthermore, while the voltage supply is 0.5V and the power consumption is 246.6nW the circuit enjoys rail-to-rail input common mode range (ICMR), high common mode rejection ratio (CMRR) of 100.3 dB @ DC, power supply rejection ratio (PSRR) of 127.8 dB@ DC, voltage gain of 61.4 dB and gain bandwidth product of 6.98 kHz for 30 pF capacitive load. The total harmonic distortion (THD) is less than 0.08% for 500mV/1kHz input sine wave signal. The circuit was designed and simulated in Cadence/Spectre environment using 0.18 µm CMOS process from TSMC.

Klíčová slova

Bulk-driven MOS transistor; FDDA; Low-voltage low-power CMOS.

Klíčová slova v angličtině

Bulk-driven MOS transistor; FDDA; Low-voltage low-power CMOS.

Autoři

KHATEB, F.; KULEJ, T.; KUMNGERN, M.; PSYCHALINOS, C.

Rok RIV

2019

Vydáno

27.03.2019

Nakladatel

ELSEVIER GMBH, URBAN & FISCHER VERLAG

Místo

Germany

ISSN

1434-8411

Periodikum

AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS

Svazek

105

Číslo

, IF: 2.853

Stát

Spolková republika Německo

Strany od

71

Strany do

77

Strany počet

7

URL

https://doi.org/10.1016/j.aeue.2019.04.007

BibTex

@article{BUT156360,
  author="Fabian {Khateb} and Tomasz {Kulej} and Montree {Kumngern} and Costas {Psychalinos}",
  title="A compact power-efficient 0.5V Fully Differential Difference Amplifier",
  journal="AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS",
  year="2019",
  volume="105",
  number=", IF: 2.853",
  pages="71--77",
  doi="10.1016/j.aeue.2019.04.007",
  issn="1434-8411",
  url="https://doi.org/10.1016/j.aeue.2019.04.007"
}