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Detail publikačního výsledku
MEGO, R.; FRÝZA, T.
Originální název
A Tool for VLIW Processors Code Optimizing
Anglický název
Druh
Stať ve sborníku v databázi WoS či Scopus
Originální abstrakt
The paper demonstrates the behavior of low- and high-level programming languages on the multicore digital signal processors based on Very Long Instruction Word architecture. The aim of the paper is to present a tool that can be used to implement any digital signal processing algorithm on such processors with efficiency of the low-level languages, but with the advantages of the high-level programming languages. Preliminary result is the software that uses a signal-flow graph approach to describe an algorithm, generates low-level assembly code and provides (graphical) information about the algorithm.
Anglický abstrakt
Klíčová slova
VLIW, low-level, assembly, C6678, FFT, DCT
Klíčová slova v angličtině
Autoři
Rok RIV
2019
Vydáno
15.02.2019
Nakladatel
Ain Shams University
Místo
Cairo, Egypt
ISBN
978-1-5386-5111-7
Kniha
Proceedings of the 13th International Conference on Computer Engineering and Systems (ICCES 2018)
Strany od
601
Strany do
604
Strany počet
4
URL
https://ieeexplore.ieee.org/document/8639186
BibTex
@inproceedings{BUT155771, author="Roman {Mego} and Tomáš {Frýza}", title="A Tool for VLIW Processors Code Optimizing", booktitle="Proceedings of the 13th International Conference on Computer Engineering and Systems (ICCES 2018)", year="2019", pages="601--604", publisher="Ain Shams University", address="Cairo, Egypt", doi="10.1109/ICCES.2018.8639186", isbn="978-1-5386-5111-7", url="https://ieeexplore.ieee.org/document/8639186" }
Dokumenty
08639186