Detail publikace

200 Gbps Hardware Accelerated Encryption System for FPGA Network Cards

MARTINÁSEK, Z. HAJNÝ, J. SMÉKAL, D. MALINA, L. MATOUŠEK, D. KEKELY, M. MENTENS, N.

Originální název

200 Gbps Hardware Accelerated Encryption System for FPGA Network Cards

Typ

článek ve sborníku ve WoS nebo Scopus

Jazyk

angličtina

Originální abstrakt

We present the architecture and implementation of our encryption system designed for 200 Gbps FPGA (Field Programmable Gate Array) network cards utilizing the IPsec (IP security) protocol. To our knowledge, our hardware encryption system is the first that is able to encrypt network traffic at the full link speed of 200 Gbps using a proven algorithm in a secure mode of operation, on a network device that is already available on the market. Our implementation is based on the AES (Advanced Encryption Standard) encryption algorithm and the GCM (Galois Counter Mode) mode of operation, therefore it provides both encryption and authentication of transferred data. The design is modular and the AES can be easily substituted or extended by other ciphers. We present the full description of the architecture of our scheme, the VHDL (VHSIC Hardware Description Language) simulation results and the results of the practical implementation on the NFB-200G2QL network cards based on the Xilinx Virtex UltraScale+ chip. We also present the integration of the encryption core with the IPsec subsystem so that the resulting implementation is interoperable with other systems.

Klíčová slova

High-speed encryption, authentication, cryptography, FPGA

Autoři

MARTINÁSEK, Z.; HAJNÝ, J.; SMÉKAL, D.; MALINA, L.; MATOUŠEK, D.; KEKELY, M.; MENTENS, N.

Vydáno

19. 10. 2018

Nakladatel

ACM

Místo

Toronto, Canada

ISBN

978-1-4503-5996-2

Kniha

The Second Workshop on Attacks and Solutions in Hardware Security (ASHES’18)

Strany od

11

Strany do

17

Strany počet

7

URL

https://dl.acm.org/citation.cfm?id=3266446

BibTex

@inproceedings{BUT149410,
  author="Zdeněk {Martinásek} and Jan {Hajný} and David {Smékal} and Lukáš {Malina} and Denis {Matoušek} and Michal {Kekely} and Nele {Mentens}",
  title="200 Gbps Hardware Accelerated Encryption System for FPGA Network Cards",
  booktitle="The Second Workshop on Attacks and Solutions in Hardware Security (ASHES’18)",
  year="2018",
  pages="11--17",
  publisher="ACM",
  address="Toronto, Canada",
  doi="10.1145/3266444.3266446",
  isbn="978-1-4503-5996-2",
  url="https://dl.acm.org/citation.cfm?id=3266446"
}