Detail publikačního výsledku

Algebraic Analysis of Feedback Loop Dependencies in Order of Improving RTL Digital Circuit Testability

STRNADEL, J.

Originální název

Algebraic Analysis of Feedback Loop Dependencies in Order of Improving RTL Digital Circuit Testability

Anglický název

Algebraic Analysis of Feedback Loop Dependencies in Order of Improving RTL Digital Circuit Testability

Druh

Stať ve sborníku mimo WoS a Scopus

Originální abstrakt

The existence of loops in a circuit structure causes problems in both test generation and application. When nested loops occur in the circuit, it is necessary to break the most nested one(s) to improve circuit testability significantly, with minimal design cost. The paper deals with a new method of detecting and breaking loops in the register-transfer level (RTL) digital circuit structure.

Anglický abstrakt

The existence of loops in a circuit structure causes problems in both test generation and application. When nested loops occur in the circuit, it is necessary to break the most nested one(s) to improve circuit testability significantly, with minimal design cost. The paper deals with a new method of detecting and breaking loops in the register-transfer level (RTL) digital circuit structure.

Klíčová slova

Feedback vertex set problem, feedback arc set problem, loop coverage, loop dependencies, algebraic analysis, linear algebra, matrix operations

Klíčová slova v angličtině

Feedback vertex set problem, feedback arc set problem, loop coverage, loop dependencies, algebraic analysis, linear algebra, matrix operations

Autoři

STRNADEL, J.

Vydáno

14.04.2003

Nakladatel

Publishing House of Poznan University of Technology

Místo

Poznan

ISBN

83-7143-557-6

Kniha

Proceedings of IEEE Workshop on Design and Diagnostic of Electronic Circuits and Systems

Strany od

303

Strany do

304

Strany počet

2

URL

https://www.fit.vut.cz/research/publication/7160/

BibTex

@inproceedings{BUT13959,
  author="Josef {Strnadel}",
  title="Algebraic Analysis of Feedback Loop Dependencies in Order of Improving RTL Digital Circuit Testability",
  booktitle="Proceedings of IEEE Workshop on Design and Diagnostic of Electronic Circuits and Systems",
  year="2003",
  pages="303--304",
  publisher="Publishing House of Poznan University of Technology",
  address="Poznan",
  isbn="83-7143-557-6",
  url="https://www.fit.vut.cz/research/publication/7160/"
}

Dokumenty

2003-ddecs