Detail publikačního výsledku

Resistorless Electronically Tunable Grounded Inductance Simulator Design

HERENCSÁR, N.; KARTCI, A.

Originální název

Resistorless Electronically Tunable Grounded Inductance Simulator Design

Anglický název

Resistorless Electronically Tunable Grounded Inductance Simulator Design

Druh

Stať ve sborníku v databázi WoS či Scopus

Originální abstrakt

A new realization of grounded lossless positive inductance simulator (PIS) using simple inverting voltage buffer and unity-gain current follower/inverter (CF±) is reported. Considering the input intrinsic resistance of CF± as useful active parameter, the proposed PIS can be considered as resistorless circuit and it only employs in total 16 Metal-Oxide-Semiconductor (MOS) transistors and a grounded capacitor. The resulting equivalent inductance value of the proposed simulator can be adjusted via change of input intrinsic resistance of CF± by means of its supply voltages. The behavior of the proposed simulator circuit is tested via implementation in voltage-mode 5th-order high-pass filter RLC prototype with Bessel, Butterworth, and Chebyshev I approximation. Theoretical results are verified by SPICE simulations using TSMC 0.18 μm level-7 LO EPI SCN018 CMOS process parameters with ±0.9 V supply voltages.

Anglický abstrakt

A new realization of grounded lossless positive inductance simulator (PIS) using simple inverting voltage buffer and unity-gain current follower/inverter (CF±) is reported. Considering the input intrinsic resistance of CF± as useful active parameter, the proposed PIS can be considered as resistorless circuit and it only employs in total 16 Metal-Oxide-Semiconductor (MOS) transistors and a grounded capacitor. The resulting equivalent inductance value of the proposed simulator can be adjusted via change of input intrinsic resistance of CF± by means of its supply voltages. The behavior of the proposed simulator circuit is tested via implementation in voltage-mode 5th-order high-pass filter RLC prototype with Bessel, Butterworth, and Chebyshev I approximation. Theoretical results are verified by SPICE simulations using TSMC 0.18 μm level-7 LO EPI SCN018 CMOS process parameters with ±0.9 V supply voltages.

Klíčová slova

Positive inductance simulator; PIS; grounded lossless circuit; current follower; inverting voltage buffer; 5th-order high-pass filter; RLC prototype; Bessel; Butterworth; Chebyshev I; voltage-mode

Klíčová slova v angličtině

Positive inductance simulator; PIS; grounded lossless circuit; current follower; inverting voltage buffer; 5th-order high-pass filter; RLC prototype; Bessel; Butterworth; Chebyshev I; voltage-mode

Autoři

HERENCSÁR, N.; KARTCI, A.

Rok RIV

2018

Vydáno

05.07.2017

Nakladatel

IEEE

Místo

Barcelona, Spain

ISBN

978-1-5090-3982-1

Kniha

Proceedings of the 2017 40th International Conference on Telecommunications and Signal Processing (TSP)

Strany od

279

Strany do

282

Strany počet

4

URL

http://ieeexplore.ieee.org/document/8075987/

Plný text v Digitální knihovně

http://hdl.handle.net/11012/70222

BibTex

@inproceedings{BUT138294,
  author="Norbert {Herencsár} and Aslihan {Kartci}",
  title="Resistorless Electronically Tunable Grounded Inductance Simulator Design",
  booktitle="Proceedings of the 2017 40th International Conference on Telecommunications and Signal Processing (TSP)",
  year="2017",
  pages="279--282",
  publisher="IEEE",
  address="Barcelona, Spain",
  doi="10.1109/TSP.2017.8075987",
  isbn="978-1-5090-3982-1",
  url="http://ieeexplore.ieee.org/document/8075987/"
}

Dokumenty

TSP2017_Herencsar_Kartci_final
resistorless-electronically-tunable