Quadrature oscillator based on novel low-voltage ultra-low-power quasi-floating-gate DVCC

Quadrature oscillator based on novel low-voltage ultra-low-power quasi-floating-gate DVCC

Článek WoS

In this work, a new realization topology of the low-voltage ultra-low-power quadrature oscillator is presented. This quadrature oscillator utilizes only two active elements, namely differential voltage current conveyor (DVCC), and five passive ones, all of them are grounded, which is recommended for the integrated circuit implementation. The DVCC is based on quasi-floating-gate MOS transistor, which is a distinct technique from the conventional one, featuring with operation at low-voltage and ultra-low-power conditions; hence the proposed DVCC works with low supply voltage of ± 400 mV and consumes power of merely 6.6 µW. Thanks to these features the total power dissipation of the oscillator is only 0.28 mW. The simulation results using 0.18 µm TSMC CMOS technology are included in order to prove the design correctness.

In this work, a new realization topology of the low-voltage ultra-low-power quadrature oscillator is presented. This quadrature oscillator utilizes only two active elements, namely differential voltage current conveyor (DVCC), and five passive ones, all of them are grounded, which is recommended for the integrated circuit implementation. The DVCC is based on quasi-floating-gate MOS transistor, which is a distinct technique from the conventional one, featuring with operation at low-voltage and ultra-low-power conditions; hence the proposed DVCC works with low supply voltage of ± 400 mV and consumes power of merely 6.6 µW. Thanks to these features the total power dissipation of the oscillator is only 0.28 mW. The simulation results using 0.18 µm TSMC CMOS technology are included in order to prove the design correctness.

Quadrature oscillator; Quasi-floating-gate MOST; Low-voltage ultra-low-power analog circuit design; DVCC.

Quadrature oscillator; Quasi-floating-gate MOST; Low-voltage ultra-low-power analog circuit design; DVCC.

KHATEB, F.; KHATIB, N.; KOTON, J.; HERENCSÁR, N.

2019

12.01.2018

ELSEVIER

NETHERLANDS

1026-3098

Scientia Iranica

25

6, IF: 0.475

Íránská islámská republika

3477

3489

13

http://dx.doi.org/10.24200/sci.2017.4377