Detail publikačního výsledku

Evolutionary Design of Transistor Level Digital Circuits using Discrete Simulation

MRÁZEK, V.; VAŠÍČEK, Z.

Originální název

Evolutionary Design of Transistor Level Digital Circuits using Discrete Simulation

Anglický název

Evolutionary Design of Transistor Level Digital Circuits using Discrete Simulation

Druh

Stať ve sborníku v databázi WoS či Scopus

Originální abstrakt


The objective of the paper is to introduce a new approach to the evolutionary design of digital circuits conducted directly at transistor level. In order to improve the time consuming evaluation of candidate solutions, a discrete event-driven simulator was introduced. The proposed simulator operates on multiple logic levels to achieve reasonable trade-off between performance and precision. A suitable level of abstraction reflecting the behavior of real MOSFET transistors is utilized to minimize the production of incorrectly working circuits. The proposed approach is evaluated in the evolution of basic logic circuits having more than 20 transistors. The goal of the evolutionary algorithm is to design a circuit having the minimal number of transistors and exhibiting the minimal delay. In addition to that, various parameter settings are investigated to increase the successrate of the evolutionary design.

Anglický abstrakt


The objective of the paper is to introduce a new approach to the evolutionary design of digital circuits conducted directly at transistor level. In order to improve the time consuming evaluation of candidate solutions, a discrete event-driven simulator was introduced. The proposed simulator operates on multiple logic levels to achieve reasonable trade-off between performance and precision. A suitable level of abstraction reflecting the behavior of real MOSFET transistors is utilized to minimize the production of incorrectly working circuits. The proposed approach is evaluated in the evolution of basic logic circuits having more than 20 transistors. The goal of the evolutionary algorithm is to design a circuit having the minimal number of transistors and exhibiting the minimal delay. In addition to that, various parameter settings are investigated to increase the successrate of the evolutionary design.

Klíčová slova

Evolutionary design, Transistor-level, Digital circuits, Cartesian genetic programming

Klíčová slova v angličtině

Evolutionary design, Transistor-level, Digital circuits, Cartesian genetic programming

Autoři

MRÁZEK, V.; VAŠÍČEK, Z.

Rok RIV

2016

Vydáno

15.03.2015

Nakladatel

Springer International Publishing

Místo

Berlin

ISBN

978-3-319-16500-4

Kniha

Genetic Programming, 18th European Conference, EuroGP 2015

Edice

LCNS 9025

Strany od

66

Strany do

77

Strany počet

12

URL

http://dx.doi.org/10.1007/978-3-319-16501-1_6

BibTex

@inproceedings{BUT119802,
  author="Vojtěch {Mrázek} and Zdeněk {Vašíček}",
  title="Evolutionary Design of Transistor Level Digital Circuits using Discrete Simulation",
  booktitle="Genetic Programming, 18th European Conference, EuroGP 2015",
  year="2015",
  series="LCNS 9025",
  pages="66--77",
  publisher="Springer International Publishing",
  address="Berlin",
  doi="10.1007/978-3-319-16501-1\{_}6",
  isbn="978-3-319-16500-4",
  url="http://dx.doi.org/10.1007/978-3-319-16501-1_6"
}

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