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Detail publikačního výsledku
BIOLEK, D.; BIOLKOVÁ, V.; KOLKA, Z.
Originální název
Memristor model for simulating large circuits for massively-parallel analog computing
Anglický název
Druh
Stať ve sborníku v databázi WoS či Scopus
Originální abstrakt
The model of memristor described in the paper is designed for building models of large networks for analog computations. A circuit containing thousands of memristors for finding the shortest path in a complicated maze is a typical example. The model is designed to meet the following criteria: 1. It is a model of HP memristor with linear dopant drift while respecting the physical bounds of the internal state variable. 2. Reliable operation in the SPICE environment also when simulating extremely large networks. 3. Minimization of the simulation time while computing bias points and during transient analyses. A benchmark circuit for testing the applications of various complexities is presented. The results confirm a perfect operation of the model also in applications containing thousands of memristors.
Anglický abstrakt
Klíčová slova
memristor; model; massively-parallel analog computations; SPICE
Klíčová slova v angličtině
Autoři
Rok RIV
2016
Vydáno
14.10.2015
Nakladatel
AOS L. Mikuláš
Místo
L. Mikuláš, Slovensko
ISBN
978-1-61804-245-3
Kniha
Proceedings of the KIT 2015
Strany od
1
Strany do
6
Strany počet
BibTex
@inproceedings{BUT118256, author="Dalibor {Biolek} and Viera {Biolková} and Zdeněk {Kolka}", title="Memristor model for simulating large circuits for massively-parallel analog computing", booktitle="Proceedings of the KIT 2015", year="2015", pages="1--6", publisher="AOS L. Mikuláš", address="L. Mikuláš, Slovensko", isbn="978-1-61804-245-3" }