Towards Evolvable Systems Based on the Xilinx Zynq Platform

Towards Evolvable Systems Based on the Xilinx Zynq Platform

Stať ve sborníku mimo WoS a Scopus

Field programmable gate arrays (FPGAs) are considered as a good platform for digital evolvable hardware systems. Researchers introduced virtual reconfigurable circuits as the response to the insufficient support of partial reconfiguration in early FPGAs. Later, the features of FPGAs allowed the designers to develop evolvable systems fully exploiting native reconfiguration infrastructures. Xilinx recently introduced a new platform called Zynq-7000 all programmable (AP) system-on-chip (SoC) which has the potential to become the next revolutionary step in evolvable hardware design. The paper analyzes Zynq-7000 AP SoC from the perspective of an evolvable hardware designer. Several scenarios are described of how to implement evolvable systems on a developmental board equipped with this programmable SoC. These scenarios are evaluated in terms of area overhead, execution time, reconfiguration time and throughput. The resulting observations should be useful for those who are going to develop real-world evolvable systems on the Zynq-7000 AP SoC platform.

Field programmable gate arrays (FPGAs) are considered as a good platform for digital evolvable hardware systems. Researchers introduced virtual reconfigurable circuits as the response to the insufficient support of partial reconfiguration in early FPGAs. Later, the features of FPGAs allowed the designers to develop evolvable systems fully exploiting native reconfiguration infrastructures. Xilinx recently introduced a new platform called Zynq-7000 all programmable (AP) system-on-chip (SoC) which has the potential to become the next revolutionary step in evolvable hardware design. The paper analyzes Zynq-7000 AP SoC from the perspective of an evolvable hardware designer. Several scenarios are described of how to implement evolvable systems on a developmental board equipped with this programmable SoC. These scenarios are evaluated in terms of area overhead, execution time, reconfiguration time and throughput. The resulting observations should be useful for those who are going to develop real-world evolvable systems on the Zynq-7000 AP SoC platform.

FPGA, evolvable hardware, reconfiguration, digital circuit, image filter, zynq

FPGA, evolvable hardware, reconfiguration, digital circuit, image filter, zynq

DOBAI, R.; SEKANINA, L.

2014

16.04.2013

IEEE Computational Intelligence Society

Singapur

978-1-4673-5869-9

2013 IEEE International Conference on Evolvable Systems (ICES)

Proceedings of the 2013 IEEE Symposium Series on Computational Intelligence (SSCI)

89

95

7

https://www.fit.vut.cz/research/publication/10194/

paper