Evolutionary algorithms (EA) are population-based search algorithms. They have been applied to solve numerous engineering as well as scientific design and optimization problems, in many cases outperforming conventional methods or other search-based methods. Dozens of human-competitive results obtained using EA were awarded at the annual GECCO Humies competitions. Despite these achievements, the EA-based problem solving approach has been criticized mainly because of very long runtimes, insufficient scalability, an inherently stochastic nature and a missing rigorous theoretical background, especially regarding the convergence analysis. In order to speed up the EA, particularly the fitness function evaluation, various accelerators have been proposed utilizing clusters of computers, graphics processing units (GPUs) or specialized hardware. This contribution to the Ubiquity Symposium addresses the scenario in which evolutionary design (or optimization) is carried out on a chip and candidate designs are real physical entities such as electronic circuits. It will be shown that this approach exhibits several unique features that are very relevant to the purpose of this symposium. We will address the question on what it means for a physical system to be designed evolutionarily and on what kinds of computations such physical systems perform.

Evolutionary algorithms (EA) are population-based search algorithms. They have been applied to solve numerous engineering as well as scientific design and optimization problems, in many cases outperforming conventional methods or other search-based methods. Dozens of human-competitive results obtained using EA were awarded at the annual GECCO Humies competitions. Despite these achievements, the EA-based problem solving approach has been criticized mainly because of very long runtimes, insufficient scalability, an inherently stochastic nature and a missing rigorous theoretical background, especially regarding the convergence analysis. In order to speed up the EA, particularly the fitness function evaluation, various accelerators have been proposed utilizing clusters of computers, graphics processing units (GPUs) or specialized hardware. This contribution to the Ubiquity Symposium addresses the scenario in which evolutionary design (or optimization) is carried out on a chip and candidate designs are real physical entities such as electronic circuits. It will be shown that this approach exhibits several unique features that are very relevant to the purpose of this symposium. We will address the question on what it means for a physical system to be designed evolutionarily and on what kinds of computations such physical systems perform.