Detail publikačního výsledku

The Formal Approach to the RTL Test Application Problem Using Petri Nets

RŮŽIČKA, R.

Originální název

The Formal Approach to the RTL Test Application Problem Using Petri Nets

Anglický název

The Formal Approach to the RTL Test Application Problem Using Petri Nets

Druh

Stať ve sborníku mimo WoS a Scopus

Originální abstrakt

An approach to solve the test application problem is presented. On the basis of RT-level digital circuit formal model, properties of circuit elements, which are important for test controller synthesis, are discussed. Algorithm to extract such information from the model of the circuit and algorithm to create a model of test application to the selected circuit element are presented. To evaluate the relevance of given path for diagnostic data and possibility of parallelism, Petri Nets concept is used.

Anglický abstrakt

An approach to solve the test application problem is presented. On the basis of RT-level digital circuit formal model, properties of circuit elements, which are important for test controller synthesis, are discussed. Algorithm to extract such information from the model of the circuit and algorithm to create a model of test application to the selected circuit element are presented. To evaluate the relevance of given path for diagnostic data and possibility of parallelism, Petri Nets concept is used.

Klíčová slova

Design for Testability, Testability Analysis, Test Application Problem, Petri Nets

Klíčová slova v angličtině

Design for Testability, Testability Analysis, Test Application Problem, Petri Nets

Autoři

RŮŽIČKA, R.

Vydáno

17.04.2002

Nakladatel

Faculty of Information Technology BUT

Místo

Brno

ISBN

80-214-2094-4

Kniha

Proceedings of IEEE Design and Diagnostics of Electronic Circuits and Systems 2002

Strany od

78

Strany do

86

Strany počet

9

BibTex

@inproceedings{BUT10023,
  author="Richard {Růžička}",
  title="The Formal Approach to the RTL Test Application Problem Using Petri Nets",
  booktitle="Proceedings of IEEE Design and Diagnostics of Electronic Circuits and Systems 2002",
  year="2002",
  pages="78--86",
  publisher="Faculty of Information Technology BUT",
  address="Brno",
  isbn="80-214-2094-4"
}