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Detail publikačního výsledku
ZACHARIÁŠOVÁ, M.; KAŠTIL, J.; KOTÁSEK, Z.
Originální název
Verification of Fault-tolerant Methodologies for FPGA Systems
Anglický název
Druh
Stať ve sborníku mimo WoS a Scopus
Originální abstrakt
The aim of this paper is to fi nd a way how to utilize and compare diff erent FT methodologies we have been working with during the last few years as well as those which are new in the FT fi eld. Moreover, we present a platform for testing di erent FT methodologies implemented in an FPGA. The testing is based on the software-based injection of an SEU into the selected region of the FPGA from a PC through the JTAG interface. After fault injection into a non-speci c place in the FPGA it is necessary to explore the whole state space using input test vectors.
Anglický abstrakt
Klíčová slova
fault-tolerant, FPGA, partial dynamic reconfiguration
Klíčová slova v angličtině
Autoři
Vydáno
28.02.2012
Nakladatel
Politecnico di Milano
Místo
Annecy
Kniha
The First Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale (MEDIAN'12)
Strany od
55
Strany do
58
Strany počet
4
BibTex
@inproceedings{BUT97007, author="Marcela {Zachariášová} and Jan {Kaštil} and Zdeněk {Kotásek}", title="Verification of Fault-tolerant Methodologies for FPGA Systems", booktitle="The First Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale (MEDIAN'12)", year="2012", pages="55--58", publisher="Politecnico di Milano", address="Annecy" }