Detail publikačního výsledku

Evolutionary Optimization of Complex Digital Circuits

VAŠÍČEK, Z.; SEKANINA, L.

Originální název

Evolutionary Optimization of Complex Digital Circuits

Anglický název

Evolutionary Optimization of Complex Digital Circuits

Druh

Stať ve sborníku mimo WoS a Scopus

Originální abstrakt

This contribution is based on the paper Formal Verification of Candidate Solutions for Post-Synthesis Evolutionary Optimization in Evolvable Hardware that has been published in Genetic Programming and Evolvable Machines journal, Volume 12, Number 3, p. 305-327.

Anglický abstrakt

This contribution is based on the paper Formal Verification of Candidate Solutions for Post-Synthesis Evolutionary Optimization in Evolvable Hardware that has been published in Genetic Programming and Evolvable Machines journal, Volume 12, Number 3, p. 305-327.

Klíčová slova

circuit synthesis, circuit optimization, evolutionary design, satisfiability, formal verification, combinational equivalence checking

Klíčová slova v angličtině

circuit synthesis, circuit optimization, evolutionary design, satisfiability, formal verification, combinational equivalence checking

Autoři

VAŠÍČEK, Z.; SEKANINA, L.

Vydáno

13.10.2011

Nakladatel

Masaryk University

Místo

Brno

ISBN

978-80-214-4305-1

Kniha

7th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science

Strany od

127

Strany do

127

Strany počet

1

BibTex

@inproceedings{BUT91278,
  author="Zdeněk {Vašíček} and Lukáš {Sekanina}",
  title="Evolutionary Optimization of Complex Digital Circuits",
  booktitle="7th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science",
  year="2011",
  pages="127--127",
  publisher="Masaryk University",
  address="Brno",
  isbn="978-80-214-4305-1"
}