Detail publikačního výsledku

Imaging Algorithm Speedup Using Co-Design

ZEMČÍK, P.; FUČÍK, O.; RICHTER, M.; VALENTA, P.

Originální název

Imaging Algorithm Speedup Using Co-Design

Anglický název

Imaging Algorithm Speedup Using Co-Design

Druh

Stať ve sborníku mimo WoS a Scopus

Originální abstrakt

The contribution shows a possibility to speed up image processing algorithms using a suitable combination of DSP and FPGA and also demonstrates methods to distribute the computational tasks between the DSP and FPGA.

Anglický abstrakt

The contribution shows a possibility to speed up image processing algorithms using a suitable combination of DSP and FPGA and also demonstrates methods to distribute the computational tasks between the DSP and FPGA.

Klíčová slova

co-design, image processing, FPGA

Klíčová slova v angličtině

co-design, image processing, FPGA

Autoři

ZEMČÍK, P.; FUČÍK, O.; RICHTER, M.; VALENTA, P.

Rok RIV

2011

Vydáno

11.06.2001

Nakladatel

Faculty of Electrical Engineering and Informatics, University of Technology Košice

Místo

Štrbské Pleso

ISBN

80-227-1542-5

Kniha

Summaries Volume Process Control 01

Strany od

96

Strany do

97

Strany počet

2

BibTex

@inproceedings{BUT5744,
  author="Pavel {Zemčík} and Otto {Fučík} and Miloslav {Richter} and Pavel {Valenta}",
  title="Imaging Algorithm Speedup Using Co-Design",
  booktitle="Summaries Volume Process Control 01",
  year="2001",
  pages="96--97",
  publisher="Faculty of Electrical Engineering and Informatics, University of Technology Košice",
  address="Štrbské Pleso",
  isbn="80-227-1542-5"
}