Detail publikačního výsledku

Novel Low-Voltage Ultra-Low-Power DVCC Based on Floating-Gate Folded Cascode OTA

KHATEB, F.; KHATIB, N.; KOTON, J.

Originální název

Novel Low-Voltage Ultra-Low-Power DVCC Based on Floating-Gate Folded Cascode OTA

Anglický název

Novel Low-Voltage Ultra-Low-Power DVCC Based on Floating-Gate Folded Cascode OTA

Druh

Článek WoS

Originální abstrakt

In this paper, novel low-voltage ultra-low-power differential voltage current conveyor (DVCC) based on folded cascode operational transconductance amplifier OTA with only one differential pairs floating-gate MOS transistor (FG-MOST) is presented. The main features of the proposed conveyor are design simplicity; rail-to-rail input voltage swing capability at a low supply voltage of +-0.5 V and ultra-low-power consumption of mere 10 uW. Thanks to these features, the proposed circuit could be successfully employed in a wide range of low-voltage ultra-low-power analog signal processing applications. Implementation of new multifunction frequency filter based on the proposed FG-DVCC is presented in this paper to take the advantages of the properties of the proposed circuit. PSpice simulation results using 0.18 um CMOS technology are included as well to validate the functionality of the proposed circuit.

Anglický abstrakt

In this paper, novel low-voltage ultra-low-power differential voltage current conveyor (DVCC) based on folded cascode operational transconductance amplifier OTA with only one differential pairs floating-gate MOS transistor (FG-MOST) is presented. The main features of the proposed conveyor are design simplicity; rail-to-rail input voltage swing capability at a low supply voltage of +-0.5 V and ultra-low-power consumption of mere 10 uW. Thanks to these features, the proposed circuit could be successfully employed in a wide range of low-voltage ultra-low-power analog signal processing applications. Implementation of new multifunction frequency filter based on the proposed FG-DVCC is presented in this paper to take the advantages of the properties of the proposed circuit. PSpice simulation results using 0.18 um CMOS technology are included as well to validate the functionality of the proposed circuit.

Klíčová slova

Floating-gate MOST; Low-voltage ultra-low-power analog circuit design; Current mode; DVCC; Universal filter

Klíčová slova v angličtině

Floating-gate MOST; Low-voltage ultra-low-power analog circuit design; Current mode; DVCC; Universal filter

Autoři

KHATEB, F.; KHATIB, N.; KOTON, J.

Rok RIV

2012

Vydáno

08.06.2011

Nakladatel

ELSEVIER

Místo

England

ISSN

0026-2692

Periodikum

MICROELECTRONICS JOURNAL

Svazek

2011 (42)

Číslo

8, IF:0.919

Stát

Spojené království Velké Británie a Severního Irska

Strany od

1010

Strany do

1017

Strany počet

8

URL

http://www.sciencedirect.com/science/article/pii/S0026269211001042

BibTex

@article{BUT49893,
  author="Fabian {Khateb} and Nabhan {Khatib} and Jaroslav {Koton}",
  title="Novel Low-Voltage Ultra-Low-Power DVCC Based on Floating-Gate Folded Cascode OTA",
  journal="MICROELECTRONICS JOURNAL",
  year="2011",
  volume="2011 (42)",
  number="8, IF:0.919",
  pages="1010--1017",
  doi="10.1016/j.mejo.2011.05.001",
  issn="0026-2692",
  url="http://www.sciencedirect.com/science/article/pii/S0026269211001042"
}