Detail publikačního výsledku

FPGA Based Test Module for Error Bit Evaluation in Serial Links

KOLOUCH, J.

Originální název

FPGA Based Test Module for Error Bit Evaluation in Serial Links

Anglický název

FPGA Based Test Module for Error Bit Evaluation in Serial Links

Druh

Článek recenzovaný mimo WoS a Scopus

Originální abstrakt

Test module based on FPGA is designed for serial links. Errors detected by test are preliminarily evaluated and corresponding information is sent by the Ethernet interface into a master computer. The module is suitable for long-term testing without need of human intervention.

Anglický abstrakt

Test module based on FPGA is designed for serial links. Errors detected by test are preliminarily evaluated and corresponding information is sent by the Ethernet interface into a master computer. The module is suitable for long-term testing without need of human intervention.

Klíčová slova

serial link, bit error rate, LFSR counter, FPGA

Klíčová slova v angličtině

serial link, bit error rate, LFSR counter, FPGA

Autoři

KOLOUCH, J.

Vydáno

01.04.2006

Nakladatel

Ústav radioelektroniky, VUT v Brně

Místo

Brno

ISSN

1210-2512

Periodikum

Radioengineering

Svazek

2006

Číslo

1

Stát

Česká republika

Strany od

38

Strany do

41

Strany počet

4

BibTex

@article{BUT43006,
  author="Jaromír {Kolouch}",
  title="FPGA Based Test Module for Error Bit Evaluation in Serial Links",
  journal="Radioengineering",
  year="2006",
  volume="2006",
  number="1",
  pages="38--41",
  issn="1210-2512"
}