Detail publikačního výsledku

Synchronous Counters Implemented in the PLD Devices

KOLOUCH, J.

Originální název

Synchronous Counters Implemented in the PLD Devices

Anglický název

Synchronous Counters Implemented in the PLD Devices

Druh

Článek recenzovaný mimo WoS a Scopus

Originální abstrakt

The analysis of various types of synchronous counters aimed to the their implementation in PLD devices is performed. The expressions for counter bits and their requirements for number of terms when implemented in registers of D- and T- type are involved.

Anglický abstrakt

The analysis of various types of synchronous counters aimed to the their implementation in PLD devices is performed. The expressions for counter bits and their requirements for number of terms when implemented in registers of D- and T- type are involved.

Klíčová slova v angličtině

programmable logic devices, synchronous counters, product terms, implementability

Autoři

KOLOUCH, J.

Vydáno

01.04.1999

ISSN

1210-2512

Periodikum

Radioengineering

Svazek

8

Číslo

1

Stát

Česká republika

Strany od

14

Strany počet

5

BibTex

@article{BUT37591,
  author="Jaromír {Kolouch}",
  title="Synchronous Counters Implemented in the PLD Devices",
  journal="Radioengineering",
  year="1999",
  volume="8",
  number="1",
  pages="5",
  issn="1210-2512"
}