Detail publikačního výsledku

Gate-Controlled 3.3V CMOS Transistor-Based Constant Phase Element Design

SEMENOV, D.; ŠOTNER, R.; JEŘÁBEK, J.; THEUMER, R.

Originální název

Gate-Controlled 3.3V CMOS Transistor-Based Constant Phase Element Design

Anglický název

Gate-Controlled 3.3V CMOS Transistor-Based Constant Phase Element Design

Druh

Stať ve sborníku v databázi WoS či Scopus

Originální abstrakt

The paper deals with the design of an electronically configurable fractional-order (FO) circuit based on the change of capacity of a CMOS transistor by applying different DC voltages at its gate. CMOS transistors and resistor dimensions were calculated for a phase value of –45◦ (corresponding to fractional order of –0.5) and phase ripple 1◦ in a frequency band of 1 kHz to 1 MHz and then connected as a parallel combination of serial RC structures with further pseudo-capacity control using the gate voltage (varicap feature). Circuit behavior was confirmed by transient and AC simulations in Cadence Virtuoso with process simulations (corners, Monte-Carlo) and further post-layout parasitic extraction simulations.

Anglický abstrakt

The paper deals with the design of an electronically configurable fractional-order (FO) circuit based on the change of capacity of a CMOS transistor by applying different DC voltages at its gate. CMOS transistors and resistor dimensions were calculated for a phase value of –45◦ (corresponding to fractional order of –0.5) and phase ripple 1◦ in a frequency band of 1 kHz to 1 MHz and then connected as a parallel combination of serial RC structures with further pseudo-capacity control using the gate voltage (varicap feature). Circuit behavior was confirmed by transient and AC simulations in Cadence Virtuoso with process simulations (corners, Monte-Carlo) and further post-layout parasitic extraction simulations.

Klíčová slova

Fractional-order systems, fractional-order element, Constant Phase Element (CPE), varicap, CMOS, integrated circuit design

Klíčová slova v angličtině

Fractional-order systems, fractional-order element, Constant Phase Element (CPE), varicap, CMOS, integrated circuit design

Autoři

SEMENOV, D.; ŠOTNER, R.; JEŘÁBEK, J.; THEUMER, R.

Vydáno

08.09.2025

Nakladatel

IEEE

ISBN

979-8-3315-3647-3

Kniha

Proceedings of 2025 International Conference on Applied Electronics

Strany počet

6

URL

https://doi.org/10.1109/AE66163.2025.11197785

BibTex

@inproceedings{BUT199544,
  author="{} and Dmitrii {Semenov} and  {} and Roman {Šotner} and  {} and Jan {Jeřábek} and Radek {Theumer}",
  title="Gate-Controlled 3.3V CMOS Transistor-Based Constant Phase Element Design",
  booktitle="Proceedings of 2025 International Conference on Applied Electronics",
  year="2025",
  pages="6",
  publisher="IEEE",
  doi="10.1109/ae66163.2025.11197785",
  isbn="979-8-3315-3647-3",
  url="https://doi.org/10.1109/AE66163.2025.11197785"
}