Flux-Controlled Memristor Emulator and Its Experimental Results

Flux-Controlled Memristor Emulator and Its Experimental Results

Článek WoS

A flux-controlled memristor emulator built with off-the-shelf electronic devices and based on a TiO₂ model is presented in this article. The circuit proposed in this article uses the current mode approach based analog building blocks such as a second-generation current conveyor (CCII) and an operational transconductance amplifier (OTA) as an active element with few passive elements. The circuit shows a clear fingerprint of an ideal memristor. The offered emulator circuit can be made to operate in incremental and decremental modes and functions well up to 26.3 MHz. Nonvolatility, Monte Carlo sampling, and corner analysis simulations are executed to verify the robustness of the circuit. The functional verification of the presented circuit is performed using the 0.18-μm CMOS parameter at a supply voltage of ±1.2 V. The experimental demonstration is carried out by making a prototype on a breadboard using ICs AD844AN and CA3080, which exhibits a good agreement with theoretical and simulation results. The layout of the circuit, which requires a total chip area of 75 x 70 μm², is also created. Single/parallel combinations of a memristor, a high-pass filter, and a chaotic system are presented to demonstrate its application.

A flux-controlled memristor emulator built with off-the-shelf electronic devices and based on a TiO₂ model is presented in this article. The circuit proposed in this article uses the current mode approach based analog building blocks such as a second-generation current conveyor (CCII) and an operational transconductance amplifier (OTA) as an active element with few passive elements. The circuit shows a clear fingerprint of an ideal memristor. The offered emulator circuit can be made to operate in incremental and decremental modes and functions well up to 26.3 MHz. Nonvolatility, Monte Carlo sampling, and corner analysis simulations are executed to verify the robustness of the circuit. The functional verification of the presented circuit is performed using the 0.18-μm CMOS parameter at a supply voltage of ±1.2 V. The experimental demonstration is carried out by making a prototype on a breadboard using ICs AD844AN and CA3080, which exhibits a good agreement with theoretical and simulation results. The layout of the circuit, which requires a total chip area of 75 x 70 μm², is also created. Single/parallel combinations of a memristor, a high-pass filter, and a chaotic system are presented to demonstrate its application.

Current mode, Memristor emulator, Pinched hysteresis loop, Chua’s oscillator.

Current mode, Memristor emulator, Pinched hysteresis loop, Chua’s oscillator.

RAJ, N.; KUMAR RANJAN, R.; KHATEB, F.

2021

01.03.2020

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC

USA

1063-8210

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

28

4, IF: 2.037

Spojené státy americké

1050

1061

12

https://doi.org/10.1109/TVLSI.2020.2966292