Detail publikačního výsledku

Packet Generators on Field Programmable Gate Array Platform

SMÉKAL, D.; HAJNÝ, J.; MARTINÁSEK, Z.

Originální název

Packet Generators on Field Programmable Gate Array Platform

Anglický název

Packet Generators on Field Programmable Gate Array Platform

Druh

Stať ve sborníku v databázi WoS či Scopus

Originální abstrakt

With the growing speed of computer networks, we need to test our solutions, network conditions, and topologies using high-speed traffic generators. The main contribution of this paper is 1) the theoretical proposal of a pseudo-random number generator (PRNG) algorithm that is usable for hardware-accelerated IP traffic generators and 2) the practical proposal of a novel design and implementation of an FPGA-based traffic generator that provides the high-speed generation of IP traffic for testing purposed, in particular for the Denial-of-Service (DoS) security testing. We present a solution for network cards based on FPGA and the NetCOPE development platform, in particular the NFB-40G2 cards. Using this platform, we explain the process of creating an IP packet and propose the VHDL architecture of the packet generator.

Anglický abstrakt

With the growing speed of computer networks, we need to test our solutions, network conditions, and topologies using high-speed traffic generators. The main contribution of this paper is 1) the theoretical proposal of a pseudo-random number generator (PRNG) algorithm that is usable for hardware-accelerated IP traffic generators and 2) the practical proposal of a novel design and implementation of an FPGA-based traffic generator that provides the high-speed generation of IP traffic for testing purposed, in particular for the Denial-of-Service (DoS) security testing. We present a solution for network cards based on FPGA and the NetCOPE development platform, in particular the NFB-40G2 cards. Using this platform, we explain the process of creating an IP packet and propose the VHDL architecture of the packet generator.

Klíčová slova

Packet; Generator; FPGA; LFSR; pseudo-random number; NetCOPE

Klíčová slova v angličtině

Packet; Generator; FPGA; LFSR; pseudo-random number; NetCOPE

Autoři

SMÉKAL, D.; HAJNÝ, J.; MARTINÁSEK, Z.

Rok RIV

2018

Vydáno

05.07.2017

Místo

Barcelona, Španělsko

ISBN

978-1-5090-3982-1

Kniha

2017 40th International Conference on Telecommunications and Signal Processing (TSP)

ISSN

1805-5435

Periodikum

International Conference on Telecommunications and Signal Processing (TSP)

Stát

Česká republika

Strany od

97

Strany do

100

Strany počet

4

URL

http://ieeexplore.ieee.org/abstract/document/8075944/

BibTex

@inproceedings{BUT135463,
  author="David {Smékal} and Jan {Hajný} and Zdeněk {Martinásek}",
  title="Packet Generators on Field Programmable Gate Array Platform",
  booktitle="2017 40th International Conference on Telecommunications and Signal Processing (TSP)",
  year="2017",
  journal="International Conference on Telecommunications and Signal Processing (TSP)",
  pages="97--100",
  address="Barcelona, Španělsko",
  doi="10.1109/TSP.2017.8075944",
  isbn="978-1-5090-3982-1",
  issn="1805-5435",
  url="http://ieeexplore.ieee.org/abstract/document/8075944/"
}