VHDL Detector IP Core

VHDL Detector IP Core

Funkční vzorek

The firmware is written in VHDL and its purpose is to configure FPGA circuit so that it detect objects in video using WaldBoost method with scaled video. This implementation is a high-perfrmance one that works on a video stream on-the-fly without any need of external frame buffer. Firmware is optimized primarily for Xilinx Zynq SoC platform.

The firmware is written in VHDL and its purpose is to configure FPGA circuit so that it detect objects in video using WaldBoost method with scaled video. This implementation is a high-perfrmance one that works on a video stream on-the-fly without any need of external frame buffer. Firmware is optimized primarily for Xilinx Zynq SoC platform.

FPGA, VHDL, WaldBoost, object detection

FPGA, VHDL, WaldBoost, object detection

http://www.fit.vutbr.cz/units/UPGM/prod/index.php?id=484¬itle=1

K využití výsledku jiným subjektem je vždy nutné nabytí licence

http://www.fit.vutbr.cz/units/UPGM/prod/index.php?id=484¬itle=1