Detail publikačního výsledku

1 V Rectifier based on bulk-driven quasi-floating-gate differential difference amplifiers

KHATEB, F.; VLASSIS, S.; KUMNGERN, M.; PSYCHALINOS, C.; KULEJ, T.; VRBA, R.; FUJCIK, L.

Originální název

1 V Rectifier based on bulk-driven quasi-floating-gate differential difference amplifiers

Anglický název

1 V Rectifier based on bulk-driven quasi-floating-gate differential difference amplifiers

Druh

Článek WoS

Originální abstrakt

This paper presents experimental results of a low-voltage (LV) low-power (LP) voltage rectifier realization, employing two differential difference amplifiers (DDA) as active elements. The proposed DDA is based on the recently presented technique named bulk-driven quasi-floating-gate (BQ) that enables the circuit to work in 1V power supply voltage, with threshold-to-supply (VTH /VDD) ratio and modulation index factor (MIF) equal to 70% and 90%, respectively. The competitive features of the proposed structure compared with other state-of-the-art circuits are the capability for working under LV supply, with extended common mode (CM) voltage range and improved input transconductance. The proposed circuit was designed, simulated and fabricated employing the Cadence platform and MOS transistors models provided by the 0.35um CMOS AMIS process. The total chip area was 213um x 266um. The provided simulation and experimental results prove the attractive performances of the proposed rectifier topology.

Anglický abstrakt

This paper presents experimental results of a low-voltage (LV) low-power (LP) voltage rectifier realization, employing two differential difference amplifiers (DDA) as active elements. The proposed DDA is based on the recently presented technique named bulk-driven quasi-floating-gate (BQ) that enables the circuit to work in 1V power supply voltage, with threshold-to-supply (VTH /VDD) ratio and modulation index factor (MIF) equal to 70% and 90%, respectively. The competitive features of the proposed structure compared with other state-of-the-art circuits are the capability for working under LV supply, with extended common mode (CM) voltage range and improved input transconductance. The proposed circuit was designed, simulated and fabricated employing the Cadence platform and MOS transistors models provided by the 0.35um CMOS AMIS process. The total chip area was 213um x 266um. The provided simulation and experimental results prove the attractive performances of the proposed rectifier topology.

Klíčová slova

Bulk-driven MOS; quasi-floating-gate MOS; Low-voltage low-power; Differential difference amplifiers; Voltage-mode rectifier.

Klíčová slova v angličtině

Bulk-driven MOS; quasi-floating-gate MOS; Low-voltage low-power; Differential difference amplifiers; Voltage-mode rectifier.

Autoři

KHATEB, F.; VLASSIS, S.; KUMNGERN, M.; PSYCHALINOS, C.; KULEJ, T.; VRBA, R.; FUJCIK, L.

Rok RIV

2016

Vydáno

06.03.2015

Nakladatel

SPRINGER BIRKHAUSER

Místo

USA

ISSN

0278-081X

Periodikum

CIRCUITS SYSTEMS AND SIGNAL PROCESSING

Svazek

2015 ( 34)

Číslo

7, IF: 1.118

Stát

Spojené státy americké

Strany od

2077

Strany do

2089

Strany počet

13

URL

http://dx.doi.org/10.1007/s00034-014-9958-3

BibTex

@article{BUT110976,
  author="Fabian {Khateb} and Spyridon {Vlassis} and Montree {Kumngern} and Costas {Psychalinos} and Tomasz {Kulej} and Radimír {Vrba} and Lukáš {Fujcik}",
  title="1 V Rectifier based on bulk-driven quasi-floating-gate differential difference amplifiers",
  journal="CIRCUITS SYSTEMS AND SIGNAL PROCESSING",
  year="2015",
  volume="2015 ( 34)",
  number="7, IF: 1.118",
  pages="2077--2089",
  doi="10.1007/s00034-014-9958-3",
  issn="0278-081X",
  url="http://dx.doi.org/10.1007/s00034-014-9958-3"
}