Framework for Fast Prototyping of Applications running on Reconfigurable Systems on Chip

Framework for Fast Prototyping of Applications running on Reconfigurable Systems on Chip

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Recently introduced chips with ARM based processors and programmable logic provide huge potential for digitalsignal processing, networking and other applications. Many IP cores and operating systems have been prepared for these chips tosimplify the development process. Nevertheless, the integration of IP cores and operating system is not covered by any developmenttool yet. Developers have to design, implement and debug the communication between hardware and software part of theapplication. Therefore we propose Reconfigurable System on Chip (RSoC) Framework to support rapid prototyping of applicationsrunning on FPGA chips with a processor. The framework consists of FPGA logic and OS drivers to support communication betweenapplication core in the FPGA and application software on the host processor. Moreover, the framework allows to configureautomatically address space of components in the FPGA and supports dynamic loading of drivers according to the FPGAconfiguration. The developer can focus only on the application software and accelerating core. For demonstration purposes, theframework is exploited in the example of a video processing application, where an image filter is running in the software andthan is accelerated in the FPGA.

Recently introduced chips with ARM based processors and programmable logic provide huge potential for digitalsignal processing, networking and other applications. Many IP cores and operating systems have been prepared for these chips tosimplify the development process. Nevertheless, the integration of IP cores and operating system is not covered by any developmenttool yet. Developers have to design, implement and debug the communication between hardware and software part of theapplication. Therefore we propose Reconfigurable System on Chip (RSoC) Framework to support rapid prototyping of applicationsrunning on FPGA chips with a processor. The framework consists of FPGA logic and OS drivers to support communication betweenapplication core in the FPGA and application software on the host processor. Moreover, the framework allows to configureautomatically address space of components in the FPGA and supports dynamic loading of drivers according to the FPGAconfiguration. The developer can focus only on the application software and accelerating core. For demonstration purposes, theframework is exploited in the example of a video processing application, where an image filter is running in the software andthan is accelerated in the FPGA.

VIKTORIN, J.; KORČEK, P.; KOŠAŘ, V.; KOŘENEK, J.

2014

08.10.2013

European Electronic Chips & Systems design Initiative

Cagliari

979-10-92279-01-6

Proceedings of the 2013 Conference on Design & Architectures for Signal & Image Processing

355

356

2

https://www.fit.vut.cz/research/publication/10393/

DASIP2013_Demo Night_Paper 4