Detail publikace

Usage of Decompilation in Processor Architecture Modeling

KŘOUSTEK, J.

Originální název

Usage of Decompilation in Processor Architecture Modeling

Typ

článek ve sborníku mimo WoS a Scopus

Jazyk

angličtina

Originální abstrakt

This paper explains concept of generic decompiler and its use in processor architecture modeling. Generic decompiler is a tool that can recompile any binary form of program to a chosen high level language representation. Output must be functionally equivalent to the input. Process of decompilation is highly dependent on the processor architecture. This problem is solvable by a special language for description of architecture and instruction semantic. Generic decompiler will be the main part of the planned tool - generic debugger. Special case of usage of such a tool is debugging optimized code for VLIW architectures, due to their complexity. The whole concept will be implemented in practice in project Lissom (FIT BUT). The Lissom project is focused on hardware/software co-design. Generic debugger will be a part of automatically generated tool-set.

Klíčová slova

reverse engineering, decompilation, debugging, Lissom, VLIW

Autoři

KŘOUSTEK, J.

Rok RIV

2009

Vydáno

6. 10. 2009

Místo

Ostrava

ISBN

978-80-86840-47-5

Kniha

Proceedings of XXXIth International Autumn Colloquium Advanced Simulation of Systems

Strany od

64

Strany do

67

Strany počet

4

BibTex

@inproceedings{BUT33749,
  author="Jakub {Křoustek}",
  title="Usage of Decompilation in Processor Architecture Modeling",
  booktitle="Proceedings of XXXIth International Autumn Colloquium Advanced Simulation of Systems",
  year="2009",
  pages="64--67",
  address="Ostrava",
  isbn="978-80-86840-47-5"
}