Publication result detail

Usage of Decompilation in Processor Architecture Modeling

KŘOUSTEK, J.

Original Title

Usage of Decompilation in Processor Architecture Modeling

English Title

Usage of Decompilation in Processor Architecture Modeling

Type

Paper in proceedings outside WoS and Scopus

Original Abstract

This paper explains concept of generic decompiler and its use in processor architecture modeling. Generic decompiler is a tool that can recompile any binary form of program to a chosen high level language representation. Output must be functionally equivalent to the input. Process of decompilation is highly dependent on the processor architecture. This problem is solvable by a special language for description of architecture and instruction semantic. Generic decompiler will be the main part of the planned tool - generic debugger. Special case of usage of such a tool is debugging optimized code for VLIW architectures, due to their complexity. The whole concept will be implemented in practice in project Lissom (FIT BUT). The Lissom project is focused on hardware/software co-design. Generic debugger will be a part of automatically generated tool-set.

English abstract

This paper explains concept of generic decompiler and its use in processor architecture modeling. Generic decompiler is a tool that can recompile any binary form of program to a chosen high level language representation. Output must be functionally equivalent to the input. Process of decompilation is highly dependent on the processor architecture. This problem is solvable by a special language for description of architecture and instruction semantic. Generic decompiler will be the main part of the planned tool - generic debugger. Special case of usage of such a tool is debugging optimized code for VLIW architectures, due to their complexity. The whole concept will be implemented in practice in project Lissom (FIT BUT). The Lissom project is focused on hardware/software co-design. Generic debugger will be a part of automatically generated tool-set.

Keywords

reverse engineering, decompilation, debugging, Lissom, VLIW

Key words in English

reverse engineering, decompilation, debugging, Lissom, VLIW

Authors

KŘOUSTEK, J.

RIV year

2012

Released

06.10.2009

Publisher

Marq software s.r.o.

Location

Ostrava

ISBN

978-80-86840-47-5

Book

Proceedings of XXXIth International Autumn Colloquium Advanced Simulation of Systems

Pages from

64

Pages to

67

Pages count

4

BibTex

@inproceedings{BUT33749,
  author="Jakub {Křoustek}",
  title="Usage of Decompilation in Processor Architecture Modeling",
  booktitle="Proceedings of XXXIth International Autumn Colloquium Advanced Simulation of Systems",
  year="2009",
  pages="64--67",
  publisher="Marq software s.r.o.",
  address="Ostrava",
  isbn="978-80-86840-47-5"
}