Detail publikačního výsledku

DSP and FPGA Based Raster Image Processing Architecture

BERAN, V.; GRANÁT, J.; HEROUT, A.; ZEMČÍK, P.

Originální název

DSP and FPGA Based Raster Image Processing Architecture

Anglický název

DSP and FPGA Based Raster Image Processing Architecture

Druh

Stať ve sborníku mimo WoS a Scopus

Originální abstrakt

An embedded raster image processing architecture based on programmable logical chip (FPGA) connected to a digital signal processor (DSP) is proposed in the contribution. The FPGA device is used as an accelerator for the computationally critical parts of the raster image processing applications. The main advantage of the system is standalone operation, low power consumption and good performance/price and performance/power ratios.

Application development for systems containing programmable logic and processors is in many cases difficult. The contribution addresses this fact and proposes a novel application development system for the architecture. The contribution also explains the architecture from hardware and software points of view.

Anglický abstrakt

An embedded raster image processing architecture based on programmable logical chip (FPGA) connected to a digital signal processor (DSP) is proposed in the contribution. The FPGA device is used as an accelerator for the computationally critical parts of the raster image processing applications. The main advantage of the system is standalone operation, low power consumption and good performance/price and performance/power ratios.

Application development for systems containing programmable logic and processors is in many cases difficult. The contribution addresses this fact and proposes a novel application development system for the architecture. The contribution also explains the architecture from hardware and software points of view.

Klíčová slova

FPGA, DSP, configurable logical devices, image processing, raster graphics

Klíčová slova v angličtině

FPGA, DSP, configurable logical devices, image processing, raster graphics

Autoři

BERAN, V.; GRANÁT, J.; HEROUT, A.; ZEMČÍK, P.

Vydáno

12.12.2006

Nakladatel

Zilina University Publisher

Místo

Žilina

Kniha

Proceedings of the Digital Technologies 2007 Workshop

Strany od

1

Strany do

6

Strany počet

6

BibTex

@inproceedings{BUT22405,
  author="Vítězslav {Beran} and Jiří {Granát} and Adam {Herout} and Pavel {Zemčík}",
  title="DSP and FPGA Based Raster Image Processing Architecture",
  booktitle="Proceedings of the Digital Technologies 2007 Workshop",
  year="2006",
  pages="1--6",
  publisher="Zilina University Publisher",
  address="Žilina"
}