Publication result detail

DSP and FPGA Based Raster Image Processing Architecture

BERAN, V.; GRANÁT, J.; HEROUT, A.; ZEMČÍK, P.

Original Title

DSP and FPGA Based Raster Image Processing Architecture

English Title

DSP and FPGA Based Raster Image Processing Architecture

Type

Paper in proceedings outside WoS and Scopus

Original Abstract

An embedded raster image processing architecture based on programmable logical chip (FPGA) connected to a digital signal processor (DSP) is proposed in the contribution. The FPGA device is used as an accelerator for the computationally critical parts of the raster image processing applications. The main advantage of the system is standalone operation, low power consumption and good performance/price and performance/power ratios.

Application development for systems containing programmable logic and processors is in many cases difficult. The contribution addresses this fact and proposes a novel application development system for the architecture. The contribution also explains the architecture from hardware and software points of view.

English abstract

An embedded raster image processing architecture based on programmable logical chip (FPGA) connected to a digital signal processor (DSP) is proposed in the contribution. The FPGA device is used as an accelerator for the computationally critical parts of the raster image processing applications. The main advantage of the system is standalone operation, low power consumption and good performance/price and performance/power ratios.

Application development for systems containing programmable logic and processors is in many cases difficult. The contribution addresses this fact and proposes a novel application development system for the architecture. The contribution also explains the architecture from hardware and software points of view.

Keywords

FPGA, DSP, configurable logical devices, image processing, raster graphics

Key words in English

FPGA, DSP, configurable logical devices, image processing, raster graphics

Authors

BERAN, V.; GRANÁT, J.; HEROUT, A.; ZEMČÍK, P.

Released

12.12.2006

Publisher

Zilina University Publisher

Location

Žilina

Book

Proceedings of the Digital Technologies 2007 Workshop

Pages from

1

Pages to

6

Pages count

6

BibTex

@inproceedings{BUT22405,
  author="Vítězslav {Beran} and Jiří {Granát} and Adam {Herout} and Pavel {Zemčík}",
  title="DSP and FPGA Based Raster Image Processing Architecture",
  booktitle="Proceedings of the Digital Technologies 2007 Workshop",
  year="2006",
  pages="1--6",
  publisher="Zilina University Publisher",
  address="Žilina"
}