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ŠVÉDA, M.
Originální název
Reuse of Formal Specifications in Embedded Systems Design
Anglický název
Druh
Stať ve sborníku mimo WoS a Scopus
Originální abstrakt
This paper deals with reuse of architectural and behavioral specifications of embedded systems employing finite-state and timed automata. The contribution proposes not only how to represent a system's formal specification as an application pattern structure of specification fragments, but also how to measure similarity of formal specifications for retrieval with case-based reasoning support. The paper provides also an insight into case-based reasoning support as applied to formal specification reuse by application patterns built on finite-state and timed automata. Those application patterns create a base for a pattern language supporting reuse-oriented design process for a class of real-time embedded systems. Copyright © 2006 IFAC
Anglický abstrakt
Klíčová slova
Embedded systems, design systems, formal specification, computer communication networks, sensor systems
Klíčová slova v angličtině
Autoři
Vydáno
14.02.2006
Nakladatel
Faculty of Electrical Engineering and Communication BUT
Místo
Brno
ISBN
80-214-3130-X
Kniha
Proceedings of IFAC Workshop on PROGRAMMABLE DEVICES and EMBEDDED SYSTEMS PDeS 2006
Strany od
78
Strany do
83
Strany počet
6
BibTex
@inproceedings{BUT22176, author="Miroslav {Švéda}", title="Reuse of Formal Specifications in Embedded Systems Design", booktitle="Proceedings of IFAC Workshop on PROGRAMMABLE DEVICES and EMBEDDED SYSTEMS PDeS 2006", year="2006", pages="78--83", publisher="Faculty of Electrical Engineering and Communication BUT", address="Brno", isbn="80-214-3130-X" }