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Detail publikačního výsledku
PODIVÍNSKÝ, J.; KOTÁSEK, Z.
Originální název
The Use of Functional Verification for Monitoring Impact of Faults in SRAM-based FPGAs
Anglický název
Druh
Stať ve sborníku mimo WoS a Scopus
Originální abstrakt
The aim of this paper is to present a new platform for evaluating impact of faults on electro-mechanical systems based on SRAM-based FPGAs. Functional verification together with the fault injector serve as a tool for the fault tolerance evaluation. The article demonstrates the use of the verification environment for evaluating impacts of faults in electro-mechanical systems. Our system consists of mechanical robot and its electronic controller implemented into FPGA. The experimental results gained from the verification process are also presented and discussed in the paper.
Anglický abstrakt
Klíčová slova
FPGAfunctional verificationrobot controllerfault tolerancefault injection
Klíčová slova v angličtině
Autoři
Rok RIV
2018
Vydáno
29.06.2017
Nakladatel
Faculty of Information Technology, Czech Technical University
Místo
Roztoky u Prahy
ISBN
978-80-01-06178-7
Kniha
Proceedings of the 5th Prague Embedded Systems Workshop
Strany od
81
Strany do
82
Strany počet
2
URL
https://www.fit.vut.cz/research/publication/11452/
BibTex
@inproceedings{BUT144443, author="Jakub {Podivínský} and Zdeněk {Kotásek}", title="The Use of Functional Verification for Monitoring Impact of Faults in SRAM-based FPGAs", booktitle="Proceedings of the 5th Prague Embedded Systems Workshop", year="2017", pages="81--82", publisher="Faculty of Information Technology, Czech Technical University", address="Roztoky u Prahy", isbn="978-80-01-06178-7", url="https://www.fit.vut.cz/research/publication/11452/" }
Dokumenty
PESW_2017_podivinsky