prof. Dr. Ing.

Zdeněk Kolka

FEEC, UREL – Professor

+420 54114 6554
kolka@vut.cz

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prof. Dr. Ing. Zdeněk Kolka

Teaching

Consulting hours

Konzultace po předchozí domluvě e-mailem.

Guaranteed courses

BKC-ESICircuit Modeling and Simulations
Czech, winter, FEEC, UREL
BPC-ESICircuit Modelling and Simulation
Czech, winter, FEEC, UREL
MKC-PKSComputer and Communication Networks
Czech, summer, FEEC, UREL
MPC-PKSComputer and Communication Networks
Czech, summer, FEEC, UREL
MPA-PKSComputer and Communication Networks
English, summer, FEEC, UREL
DKC-RE1Modern electronic circuit design
Czech, winter, FEEC, UREL
DPC-RE1Modern electronic circuit design
Czech, winter, FEEC, UREL
DPA-RE1Modern Electronic Circuit Design
English, winter, FEEC, UREL
DKA-RE1Modern Electronic Circuit Design
English, winter, FEEC, UREL

* Valid data for academic year 2023/2024

Lectured courses

BKC-ESICircuit Modeling and Simulations
Exercise in computer lab, Czech, winter, FEEC, UREL
BPC-ESICircuit Modelling and Simulation
Exercise in computer lab, Lecture, Czech, winter, FEEC, UREL
MKC-PKSComputer and Communication Networks
Laboratory exercise, Czech, summer, FEEC, UREL
MPC-PKSComputer and Communication Networks
Exercise in computer lab, Laboratory exercise, Lecture, Czech, summer, FEEC, UREL
MPA-PKSComputer and Communication Networks
Exercise in computer lab, Laboratory exercise, Lecture, English, summer, FEEC, UREL

* Valid data for academic year 2023/2024