Course detail

Návrh analogových integrovaných obvodů 2

FEKT-BPC-NAO2Acad. year: 2025/2026

This course extends knowledge in the field of the analog integrated circuit design.

Models of components in integrated circuits, impact of process variation, matching of transistors, design of simple topologies of operational amplifiers, Folded-cascode type operational amplifier, continuous time and clocked comparators, oscillators, protection against electrostatic discharge (ESD), testing of integrated circuits.

Computer exercises are using advanced software package (Cadence Virtuoso and Spectre) for training of complex design of analog integrated circuits.

 

Language of instruction

Czech

Number of ECTS credits

Mode of study

Not applicable.

Guarantor

doc. Ing. Vilém Kledrowetz, Ph.D.

Department

Department of Microelectronics (UMEL)

Entry knowledge

Required is knowledge of basic principles of electronics, electronic components, and basic analog circuits. Expected is knowledge of design of basic analog integrated blocks in the range of PBC-NAO and basics of work in Cadence Virtuoso design system.

 

Rules for evaluation and completion of the course

maximum 40 points for work during the semester

maximum 60 points for the final exam

Computer exercises are mandatory. A properly excused absence from a computer exercise can be replaced after agreement with the teacher.

 

Aims

The aim of this course is to extend knowledge from BPC-NAO with a focus on design of advanced analog integrated blocks.


The graduate of this course is able to:
- Perform good design of analog integrated blocks as comparators, operations amplifiers with various output stages and oscillators,
- During the design consider processing spread, electrostatic discharge and latch-up,
- Adopt the design for testability requirements,
- Use and understand advanced design tools from Cadense and Siemens (investigation of processing spread, tools for creating chip layout and its verification). 

Study aids

Not applicable.

Prerequisites and corequisites

Not applicable.

Basic literature

BAKER, R. Jacob. CMOS Circuit Design, Layout, and Simulation. Fourth edition. Piscataway, NJ: IEEE Press, 2019. ISBN 9781119481515.
HORSKÝ, Pavel. Design of analog integrated circuit 2. Brno, 2024. Učební text. VUT Brno. (CS)
RAZAVI, Behzad. Design of Analog CMOS Integrated Circuits. Second Edition. New York: McGraw-Hill Education, 2017. ISBN 978-0-07-252493-2.
SANSEN, Willy M. C. Analog design essentials. Dordrecht: Springer, 2006. ISBN 0-387-25746-2.

Recommended reading

Not applicable.

Classification of course in study plans

  • Programme BPC-NCP Bachelor's 3 year of study, winter semester, compulsory

Type of course unit

 

Lecture

26 hod., optionally

Teacher / Lecturer

doc. Ing. Vilém Kledrowetz, Ph.D.

Syllabus

Models of components in integrated circuits and process spread, MOS transistor matching.
Simple operational amplifiers – topology, stability, simulations.
Layout of integrated circuits – basic rules and their checking, extraction of parasitics, simulations including extracted parasitics.
Folded cascode type operational amplifier – design principles, rail-to-rail input, output stages.
Testing of integrated circuits
Comparators – hysteresis, offset, topologies, time continues and clocked comparators.
Design for test.
Oscillators – RC, ring, crystal.
Switched capacitor circuits.
Electrostatic discharge and latch up.
Introduction to BCD technology, DMOS transistors.
Design of circuits with DMOS transistors. 

Exercise in computer lab

26 hod., compulsory

Teacher / Lecturer

doc. Ing. Vilém Kledrowetz, Ph.D.

Syllabus

Simulations with process spread (characterizations), MOS transistor matching.
Simple operational amplifiers, Folded cascode type operational amplifier.
Output stages of operational amplifiers.
Continuous time and clocked comparators.
RC oscillators.
Circuits with switched capacitors.
Circuits with DMOS transistors, switches with DMOS transistors.