Course detail
Computation Systems Architectures
FIT-AVSAcad. year: 2020/2021
The course covers architecture of modern computational systems composed of universal as well as special-purpose processors and their memory subsystems. Instruction-level parallelism is studied on scalar, superscalar and VLIW processors. Then the processors with thread-level parallelism are discussed. Data parallelism is illustrated on SIMD streaming instructions and on graphical processors. Programming for shared memory systems in OpenMP follows and then the most proliferated multi-core multiprocessors and the advanced NUMA systems are described. Finally, the generic architecture of the graphics processing units and basic programming techniques using OpenMP are also covered. Techniques of low-power processors are also explained.
Guarantor
Department
Learning outcomes of the course unit
Overview of the architecture of modern computational systems, their capabilities, limits and future trends. The ability to estimate performance of software applications on a given computer system, identify performance issues and propose their rectification. Practical user experience with supercomputers.
Understanding of hardware limitations having impact on the efficiency of software solutions.
Prerequisites
Von-Neumann computer architecture, computer memory hierarchy, cache memories and their organization, programming in assembly and in C/C++, compiler's tasks and functions.
Co-requisites
Not applicable.
Recommended optional programme components
Not applicable.
Literature
current PPT slides for lectures.
http://inst.eecs.berkeley.edu/~cs152/sp13/
https://www.anandtech.com
Agner Fog: Software optimization resources
Baer, J.L.: Microprocessor Architecture. Cambridge University Press, 2010, 367 s., ISBN 978-0-521-76992-1.
Hennessy, J.L., Patterson, D.A.: Computer Architecture - A Quantitative Approach. 5. vydání, Morgan Kaufman Publishers, Inc., 2012, 1136 s., ISBN 1-55860-596-7.
van der Pas, R., Stotzer, E., and Terboven, T.: Using OpenMP-The Next Step, MIT Press Ltd, ISBN 9780262534789, 2017.
Planned learning activities and teaching methods
Not applicable.
Assesment methods and criteria linked to learning outcomes
Assessment of two projects, 14 hours in total and, computer laboratories and a midterm examination.
Exam prerequisites:
To get 20 out of 40 points for projects and midterm examination.
Language of instruction
Czech
Work placements
Not applicable.
Aims
To familiarize yourself with the architecture of modern computational systems based on x86, ARM and RISC-V multicore processors in configurations with uniform (UMA) and non-uniform (NUMA) shared memory, often accompanied with a GPU accelerator. To understand hardware aspects of computational systems that have a significant impact on the application performance and power consumption. To be able to assess computing possibilities of a particular architecture and to predict the performance of applications. To clarify the role of a compiler and its cooperation with processors. To be able to orientate oneself on the computational system market, to evaluate and compare various systems.
Specification of controlled education, way of implementation and compensation for absences
- Missed labs can be substituted in alternative dates.
- There will be a place for missed labs in the last week of the semester.
Classification of course in study plans
- Programme IT-MGR-2 Master's
branch MBI , any year of study, winter semester, 5 credits, elective
branch MIS , any year of study, winter semester, 5 credits, elective
branch MBS , any year of study, winter semester, 5 credits, compulsory-optional
branch MIN , any year of study, winter semester, 5 credits, elective
branch MMM , any year of study, winter semester, 5 credits, elective - Programme MITAI Master's
specialization NGRI , any year of study, winter semester, 5 credits, compulsory
specialization NSEC , any year of study, winter semester, 5 credits, compulsory
specialization NISD , any year of study, winter semester, 5 credits, compulsory
specialization NISY , any year of study, winter semester, 5 credits, compulsory
specialization NMAT , any year of study, winter semester, 5 credits, compulsory
specialization NVER , any year of study, winter semester, 5 credits, compulsory
specialization NADE , 1. year of study, winter semester, 5 credits, compulsory
specialization NBIO , 1. year of study, winter semester, 5 credits, compulsory
specialization NNET , 1. year of study, winter semester, 5 credits, compulsory
specialization NVIZ , 1. year of study, winter semester, 5 credits, compulsory
specialization NCPS , 1. year of study, winter semester, 5 credits, compulsory
specialization NEMB , 1. year of study, winter semester, 5 credits, compulsory
specialization NHPC , 1. year of study, winter semester, 5 credits, compulsory
specialization NIDE , 1. year of study, winter semester, 5 credits, compulsory
specialization NMAL , 1. year of study, winter semester, 5 credits, compulsory
specialization NSEN , 1. year of study, winter semester, 5 credits, compulsory
specialization NSPE , 1. year of study, winter semester, 5 credits, compulsory - Programme IT-MGR-2 Master's
branch MPV , 2. year of study, winter semester, 5 credits, compulsory
branch MGM , 2. year of study, winter semester, 5 credits, elective
branch MSK , 2. year of study, winter semester, 5 credits, compulsory-optional
Type of course unit
Lecture
26 hours, optionally
Teacher / Lecturer
Syllabus
- Scalar processors, pipelined instruction processing and compiler assistance.
- Superscalar processors, dynamic instruction scheduling.
- Data flow through the hierarchy of cache memories.
- Branch prediction, optimization of instruction and data fetching.
- Processors with data level parallelism.
- Multi-threaded and multi-core processors.
- Loop parallelism and code vectorization.
- Functional parallelism and acceleration of recursive algorithms.
- Synchronization on systems with shared memory.
- Algorithm for cache coherency.
- Architectures with distributed shared memory.
- Architecture and programming of graphics processing units.
- Low power processors and techniques.
Exercise in computer lab
12 hours, compulsory
Teacher / Lecturer
Syllabus
- Performance measurement for sequential codes, Roof-line model and Amdahl's law.
- Problem decomposition and cache blocking.
- Vectorisation using OpenMP.
- Loops and tasks using OpenMP
- Functional parallelism and synchronization using OpenMP.
- Raspberry PI demo
Project
14 hours, compulsory
Teacher / Lecturer
Syllabus
- Performance evaluation and code optimization using OpenMP.
- Development of an application in OpenMP on a NUMA node.