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Bachelor's Thesis
Author of thesis: Daniel Dic
Acad. year: 2025/2026
Supervisor: Ing. Petr Petyovský, Ph.D.
Reviewer: Ing. Radovan Holek, CSc.
This bachelor’s thesis addresses efficient methods for encoding decimal digits in digital systems. The theoretical part analyses the Binary Coded Decimal (BCD) representation and its limitations, and the Chen–Ho and Densely Packed Decimal (DPD) space-saving encodings, which form part of the IEEE 754-2008 standard. The practical part designs a custom encoding scheme based on Chen–Ho principles and implements it in the VHDL language. As a demonstration, a new laboratory task for the course Logické obvody a systémy was designed: a 24-hour digital clock that stores the time state directly in Chen–Ho encoded form instead of a BCD cascade. The design was synthesised in AMD Xilinx Vivado for the Artix-7 FPGA (Basys 3) and functionally verified by simulation. The comparison with the conventional BCD solution confirms a reduction in flip-flop usage, while the combinational logic (LUT) usage remains comparable. The thesis also includes complete teaching materials for the proposed laboratory task.
binary encoding of decimal digits, efficient encoding, Chen-Ho encoding, Densely Packed Decimal, BCD code, encoder and decoder, combinational circuits, FPGA, Artix-7, Basys 3, VHDL, digital clock, laboratory task
Date of defence
16.06.2026
Result of the defence
Defended (thesis was successfully defended)
Grading
C
Process of defence
Student odprezentoval připravenou prezentaci a následně odpovídal na dva dotazy položené oponentem závěrečné práce. V následné rozpravě nad bakalářskou prací nebyly položeny žádné otázky.
Language of thesis
Slovak
Faculty
Fakulta elektrotechniky a komunikačních technologií
Department
Department of Control and Instrumentation
Study programme
Automation and Measurement (BPC-AMT)
Composition of Committee
prof. Ing. Michal Prauzek, Ph.D. (předseda) doc. Ing. Petr Beneš, Ph.D. (místopředseda) doc. Ing. Jakub Arm, Ph.D. (člen) Ing. Jiří Fialka, Ph.D. (člen) Ing. Petr Petyovský, Ph.D. (člen) Ing. Lukáš Pohl, Ph.D. (člen)
Supervisor’s reportIng. Petr Petyovský, Ph.D.
Grade proposed by supervisor: C
Reviewer’s reportIng. Radovan Holek, CSc.
Grade proposed by reviewer: C
Responsibility: Mgr. et Mgr. Hana Odstrčilová