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Bachelor's Thesis
Author of thesis: Bc. Lukáš Ruman
Acad. year: 2025/2026
Supervisor: Ing. Petr Petyovský, Ph.D.
Reviewer: Ing. Soběslav Valach
This bachelor thesis deals with the analysis, software modeling, and subsequent hardware implementation of lossless entropy compression methods based on Asymmetric Numeral Systems (ANS). In the introductory part, the thesis provides a detailed comparison of the theoretical principles, memory requirements, and computational complexity of the Range variant (rANS) and the Tabled variant (tANS). Based on the results of software implementation in the C language, the tANS variant was selected for acceleration in field-programmable gate arrays (FPGA), transferring the computational complexity into the table generation phase, thus enabling real-time decompression with low latency. The designed modular architecture of the decompression system in VHDL was successfully synthesized and verified on the Nexys A7 development board featuring an Artix-7 chip. The implemented hardware decompressor demonstrated high data throughput, deterministic speed, and low logic resource utilization, confirming its suitability for deployment in embedded applications, the Internet of Things (IoT), and for the efficient storage of compressed firmware. Hardware implementation offers the possibility of integrating inherent data encryption directly into the tANS decompression process at the hardware level, providing a higher level of data protection compared to software encryption. The thesis successfully bridges theoretical knowledge from information sciences with practical engineering design while establishing a direction for future research in the hardware allocation of dedicated DSP blocks for the alternative rANS method.
compression algorithm, asymmetric numeral systems, ANS, tANS, rANS, FPGA, VHDL, implementation, decompressor, embedded systems, cyber security, DSP blocks
Date of defence
16.06.2026
Result of the defence
Defended (thesis was successfully defended)
Grading
A
Process of defence
Student odprezentoval připravenou prezentaci a následně odpovídal na dva dotazy položené oponentem závěrečné práce. V následné rozpravě o bakalářské práci byla diskutována determiničnost algoritmu. Student obhájil bakalářskou práci. Komise neměla žádné námitky k řešené práci. V průběhu odborné rozpravy student odpověděl na dotazy.
Language of thesis
Slovak
Faculty
Fakulta elektrotechniky a komunikačních technologií
Department
Department of Control and Instrumentation
Study programme
Automation and Measurement (BPC-AMT)
Composition of Committee
prof. Ing. Michal Prauzek, Ph.D. (předseda) doc. Ing. Petr Beneš, Ph.D. (místopředseda) doc. Ing. Jakub Arm, Ph.D. (člen) Ing. Jiří Fialka, Ph.D. (člen) Ing. Petr Petyovský, Ph.D. (člen) Ing. Lukáš Pohl, Ph.D. (člen)
Supervisor’s reportIng. Petr Petyovský, Ph.D.
Grade proposed by supervisor: A
Reviewer’s reportIng. Soběslav Valach
Grade proposed by reviewer: A
Responsibility: Mgr. et Mgr. Hana Odstrčilová