Course detail
Functional Verification of Digital Systems
FIT-FVSAcad. year: 2024/2025
Importance of functional verification. Requirements specification and verification plan. Simulation and creating testbenches. Functional verification and its methods (pseudo-random stimuli generation, coverage-driven verification, asserion-based verification, self-checking mechanisms). Verification methodologies and SystemVerilog language. Reporting and correction of errors. Emulation and FPGA prototyping. Validation.
Language of instruction
Number of ECTS credits
Mode of study
Guarantor
Department
Entry knowledge
Rules for evaluation and completion of the course
Aims
Overview about functional verification of digital systems. The attention is paid to creating testbenches and functional verification environments according to widely used verification methodologies (UVM) and to emulation. The aim is to understand how to detect and localize errors in digital systems and how to handle them properly.
A student will understand the main techniques of functional verification of digital systems: simulation, functional verification and its methods, emulation and prototyping. He/she will be able to analyze source codes and outputs of verification tools, to localize errors and to handle their correction. He/she will master creating basic verification environments in SystemVerilog language according to UVM verification methodology.
Study aids
Prerequisites and corequisites
Basic literature
Recommended reading
Haque, F., Michelson, J., Khan, K.: The Art of Verification with SystemVerilog Assertions, Verification Central, USA, 2006. ISBN: 0971199418.
Myer, A.: Principles of Functional Verification, Newnes, USA, 2003. ISBN: 0750676175.
Přednáškové materiály v elektronické formě.
Spear, Ch., Tumbush, G., SystemVerilog for Verification: A Guide to Learning the Testbench Language Features, Springer, USA, 2012. ISBN: 1461407141.
Elearning
Classification of course in study plans
- Programme MITAI Master's
specialization NGRI , 0 year of study, summer semester, elective
specialization NADE , 0 year of study, summer semester, elective
specialization NISD , 0 year of study, summer semester, elective
specialization NMAT , 0 year of study, summer semester, elective
specialization NSEC , 0 year of study, summer semester, elective
specialization NISY up to 2020/21 , 0 year of study, summer semester, elective
specialization NNET , 0 year of study, summer semester, elective
specialization NMAL , 0 year of study, summer semester, elective
specialization NCPS , 0 year of study, summer semester, elective
specialization NHPC , 0 year of study, summer semester, elective
specialization NVER , 0 year of study, summer semester, elective
specialization NIDE , 0 year of study, summer semester, elective
specialization NISY , 0 year of study, summer semester, elective
specialization NSPE , 0 year of study, summer semester, elective
specialization NEMB , 0 year of study, summer semester, compulsory
specialization NBIO , 0 year of study, summer semester, elective
specialization NSEN , 0 year of study, summer semester, elective
specialization NVIZ , 0 year of study, summer semester, elective
specialization NEMB , 0 year of study, summer semester, elective
Type of course unit
Lecture
Teacher / Lecturer
Syllabus
- Motivation and history of verification
- Simulation-based verification
- Functional verification: introduction
- Verification methodologies
- Self-checking mechanisms + LAB 1
- SystemVerilog: data types, stimuli generation + LAB 2
- Coverage analysis + LAB 3
- Assertions
- Assertions-based verification + LAB 4
- Register Abstraction Layer
- Invited lecture
- Validation
- Verification trends
Laboratory exercise
Teacher / Lecturer
Syllabus
- Reference model implementation.
- Verification tests implementation.
- Coverage-driven verification.
- Assertions-based verification.
Project
Teacher / Lecturer
Syllabus
Elearning