Course detail

Methods of Digital Integrated Circuits Design

FEKT-MPA-NDOAcad. year: 2023/2024

Aspects of design of digital integrated circuits. Used technologies (bipolar, CMOS, BiCMOS. Novel circuit principles, modern digital building block of ASICs. Computer exercices focused on simulation and design of digital functional blocks. Use of professional design system CADENCE for complex design of digital IC (includig layout).

Language of instruction

English

Number of ECTS credits

6

Mode of study

Not applicable.

Guarantor

doc. Ing. Lukáš Fujcik, Ph.D.

Department

Department of Microelectronics (UMEL)

Entry knowledge

Student should know:
- design of advanced combinational and sequential digital circuits by using VHDL
- define proper conditions and specifications according to designed digital circuit
- work with documentation and design any digital circuit according to this specification
- implementation of designed digital system into the programmable circuit
- verification and evaluation of designed digital system

Rules for evaluation and completion of the course

30 points - laboratory exercises.
70 points - final exam.
The content and forms of instruction in the evaluated course are specified by a regulation issued by the lecturer responsible for the course and updated for every academic year.

Aims

Aim of this course is make students familiar with modern methods for digital IC design. They will be familiar with methods for design of their blocks (including chip layout), with their properties and applications.
Student obtains following knowledge:
- is able to describe required steps in digital integrated circuit design
- is able to design advanced combinational and sequential circuits by usin VHDL
- is able to write basic TCL script for RTL synthesis performed in Cadence RTL Compiler
- is able to do analysis of digital circuit regarding speed, area and power consumption
- is able to use modern design tools for digital integrated circuit design

Study aids

Not applicable.

Prerequisites and corequisites

Not applicable.

Basic literature

Jasinski, R.: Effective Coding with VHDL: Principles and Best Practice, MIT Press Ltd., 2016, ISBN: 978-0262034227 (EN)
Pedroni, V., A: Circuit Design with VHDL, 3rd Edition, MIT Press Ltd., 2020, ISBN: 978-0262042642 (EN)
Roth, Ch., H., Jr., John, L., K.: Digital Systems Design Using VHDL, 3rd Edition, 2017, ISBN: 978-1305635142 (EN)
Kleitz, W.: Digital Electronics: A Practical Approach with VHDL, 9th Edition, Pearson, 2011, ISBN: 978-0132543033 (EN)

Recommended reading

Not applicable.

Classification of course in study plans

  • Programme MPA-MEL Master's, 2. year of study, winter semester, compulsory-optional
  • Programme MPAD-MEL Master's, 2. year of study, winter semester, compulsory-optional

Type of course unit

 

Lecture

26 hours, optionally

Teacher / Lecturer

doc. Ing. Lukáš Fujcik, Ph.D.

Syllabus

Digital integrated ciruits CMOS. Standard familly IC's.
ASICs, programmable devices. IC layout and fabrication.
Basic functional blocks of digital ICs. Combinational logic circuits.
CMOS circuit characterization. Electric-level and logic-level simulation.
Sequential logic circuits. Dynamic logic circuits.
Alternative logic structures (BiCMOS, GaAs).
Sub-system design (adders, parallel multipliers, ROM, RAM, EPROM)
Low-power CMOS logic circuits.
Design methodologies. Design and simulation tools.
Placement and routing, padding. Chip I/O circuits.
Testing, design for testability, design for manufacturability.
VHDL language.
Intellectual property (IP), system on a chip (SOC). Economical aspects of design and production.

Exercise in computer lab

39 hours, compulsory

Teacher / Lecturer

doc. Ing. Lukáš Fujcik, Ph.D.

Syllabus

Configuration of design environment, demonstration.
Electrical-level simulation.
Logic simulation, critical path.
Worst-case analysis, hazards.
Basic funtional blocks of digital ICs.
Standard logic famillies of CMOS circuits.
Programmable devices.
Layout and routing.
VHDL - structure and syntax.
VHDL - basic static and dynamic structures.
VHDL - complex example.
Testability, design for test.
Design of ASIC - case study.