Course detail

PC systems

FEKT-KSPCAcad. year: 2012/2013

The course is oriented constructionally, inform with structure I/O devices.
1. Introduction – course definition, examples.
2. Gate arrays.
3. Personal computer periferies.
4. Buses (ISA, PCI].
5. Buses (PCI, proprietary buses).
6. HDL I (ABEL, VHDL).
7. HDL II (VHDL examples).
8. Signal processors - introduction.
9. Signal processors - instruction set DSP.
10. Signal processors - DSP/PC communication.
11. Highspeed communication (DDR, LVDS, ExpressPCI).
12. Dynamic memory DDR SDRAM.
13. Optics fiber communication (1G Ethernet, 10G Ethernet).

Language of instruction

Czech

Number of ECTS credits

Mode of study

Not applicable.

Guarantor

Ing. Karel Horák, Ph.D.

Department

Department of Control and Instrumentation (UAMT)

Learning outcomes of the course unit

Basic knowledge of PC hardware, rules of construction and I/O devices control.

Prerequisites

The subject knowledge on the secondary school level is required.

Co-requisites

Not applicable.

Planned learning activities and teaching methods

Teaching methods depend on the type of course unit as specified in the article 7 of BUT Rules for Studies and Examinations.

Assesment methods and criteria linked to learning outcomes

Labs + projects: 50 points
Final Exam: 50 points
Requirements for completion of the course are specified by a regulation issued by the lecturer responsible for the course and updated for every academic year.

Course curriculum

1. Introduction – course definition, examples.
2. Gate arrays.
3. Personal computer periferies.
4. Buses (ISA, PCI].
5. Buses (PCI, proprietary buses).
6. HDL I (ABEL, VHDL).
7. HDL II (VHDL examples).
8. Signal processors - introduction.
9. Signal processors - instruction set DSP.
10. Signal processors - DSP/PC communication.
11. Highspeed communication (DDR, LVDS, ExpressPCI).
12. Dynamic memory DDR SDRAM.
13. Optics fiber communication (1G Ethernet, 10G Ethernet).

Work placements

Not applicable.

Aims

The aim of the course is to inform students about PC construction on programmer level. The course allows to understand PC function as a control computer in technology processes.

Specification of controlled education, way of implementation and compensation for absences

The content and forms of instruction in the evaluated course are specified by a regulation issued by the lecturer responsible for the course and updated for every academic year.

Recommended optional programme components

Not applicable.

Prerequisites and corequisites

Not applicable.

Basic literature

Not applicable.

Recommended reading

BUDRUK S. PCI Express System Architecture. MindShare, Inc., 2013 1280 p. ISBN 13: 978-0-321-15630-3. (EN)
MUELLER S. Personal Computer. Computer Press, 2001. 869 p. ISBN 80-7226-470-2. (EN)

Classification of course in study plans

  • Programme EECC Bc. Bachelor's

    branch BK-AMT , 3 year of study, summer semester, elective specialised

  • Programme EEKR-CZV lifelong learning

    branch EE-FLE , 1 year of study, summer semester, elective specialised

Type of course unit

 

Lecture

26 hod., optionally

Teacher / Lecturer

Ing. Karel Horák, Ph.D.

Syllabus

1. Introduction – course definition, examples.
2. Gate arrays.
3. Personal computer periferies.
4. Buses (ISA, PCI].
5. Buses (PCI, proprietary buses).
6. HDL I (ABEL, VHDL).
7. HDL II (VHDL examples).
8. Signal processors - introduction.
9. Signal processors - instruction set DSP.
10. Signal processors - DSP/PC communication.
11. Highspeed communication (DDR, LVDS, ExpressPCI).
12. Dynamic memory DDR SDRAM.
13. Optics fiber communication (1G Ethernet, 10G Ethernet).

Laboratory exercise

39 hod., optionally

Teacher / Lecturer

Ing. Karel Horák, Ph.D.

Syllabus

Individually assigned project.