Course detail
Microprocessors
FEKT-KMICAcad. year: 2011/2012
Von Neuman and harward conception of computer. Principles of microprocessor. Overlapping and pipelining. Superscalar architecture. CISC a RISC processors.
Microcontrollers Motorola HCS12: SW model. Instruction set. Peripherals: Parallel Input/Output, A/D convertor, timer system, SCI, SPI. Connectios microprocessor with external components as memoris, A/D and D/A convertors, keyboard, display.
Intel Pentium: Segmentation. Paging. Addressing modes. Virtual addressing. Real mode and protected mode. Memory protection. Gates. Proces switching. Paging unit. Interrupts.
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Assesment methods and criteria linked to learning outcomes
Course curriculum
Microcontrollers Motorola HCS12: SW model. Instruction set. Peripherals: Parallel Input/Output, A/D convertor, timer system, SCI, SPI. Connectios microprocessor with external components as memoris, A/D and D/A convertors, keyboard, display.
Intel Pentium: Segmentation. Paging. Addressing modes. Virtual addressing. Real mode and protected mode. Memory protection. Gates. Proces switching. Paging unit. Interrupts.
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Specification of controlled education, way of implementation and compensation for absences
Recommended optional programme components
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Lecture
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Syllabus
Clock cycle, phase, machine cycle,instruction cycle. Overlapping.Pipelining.
Microcontrolers HCS12 family: Programmer model, ALU. Addressing modes. Instruction set.
HCS12: Operating modes. Ports. Key Wake up function. Memory map. A/D convertor.
HCS12: Timer subsystem: Imput capture function. Output compare function. Counter/timer. RTI.
HCS12: Serial Comunication Interface (SCI). Serial Peripheral Interface (SPI). Interrupt system. Watchdog COP. Low power modes WAIT and STOP.
HCS12: Connectios microprocessor with external components as memoris, A/D and D/A convertors, keyboard, display.
Intel I386 (IA32) architecture: Programmer model. Addressing modes. Memory addressing and I/O addressing.
Intel Pentium: Privilegy levels. Local and global address space. GDI and LDI tables. Logical address, linear address. Segment descriptors. Data segment Acces.
Intel Pentium: Calling instruction segment. Gates. Task switching. I/O operations in Protected mode.
Paging unit.
Intel pentium P6 architecture. Embedded systems.
Exercise in computer lab
Teacher / Lecturer
Syllabus
Decimal, hexadecimal and binary numbers. Fractional representation. Addition, substraction binary numbers. First complemment.
Miltiplication and division binary numbers. Floating point numbers, IEEE-754 standard.
Assembler HCS12. Prougrams for addition and substraction 16 bit and 32 bit numbers.
Assembler programme for multiplication two 16 bit numbers with using shift instructions.
Assembler programme for multiplication two 16 bit numbers with using MUL instructions.
Assembler programme - demonstration use of A/D convertor.
C language and microcontrollers. C programme for A/D (transfer from assembler).
C programme - Use of output compare functions for generating 1 s width pulses.
C programme - Use of input capture functions for puls width measurement.
C programme - Use of RTI function.
C programme - Use of SCI, communitation microcontroller with PC.
Ending.