Detail publikačního výsledku

Accelerated Modular Arithmetic for Low-Performance Devices

MALINA, L.; HAJNÝ, J.

Original Title

Accelerated Modular Arithmetic for Low-Performance Devices

English Title

Accelerated Modular Arithmetic for Low-Performance Devices

Type

Paper in proceedings (conference paper)

Original Abstract

The paper deals with efficient modular arithmetic algorithms for resource restricted devices like smart-cards or sensors. The modular arithmetic is important for a wide variety of computations in these devices, from communication to signal processing. To speed up some cryptographic operations, the most widespread devices often have some cryptographic support provided by a dedicated chip. Our goal is to use the resources of a crypto-coprocessor to accelerate general modular operations. The paper describes our implementation of modular arithmetic operations with large integers, and provides the comparison of the accelerated method with three classical methods for (modular) multiplication.

English abstract

The paper deals with efficient modular arithmetic algorithms for resource restricted devices like smart-cards or sensors. The modular arithmetic is important for a wide variety of computations in these devices, from communication to signal processing. To speed up some cryptographic operations, the most widespread devices often have some cryptographic support provided by a dedicated chip. Our goal is to use the resources of a crypto-coprocessor to accelerate general modular operations. The paper describes our implementation of modular arithmetic operations with large integers, and provides the comparison of the accelerated method with three classical methods for (modular) multiplication.

Keywords

Cryptography, modular arithmetic, multiplication, .NET, RSA, smart-cards.

Key words in English

Cryptography, modular arithmetic, multiplication, .NET, RSA, smart-cards.

Authors

MALINA, L.; HAJNÝ, J.

RIV year

2012

Released

18.08.2011

ISBN

978-1-4577-1411-5

Book

34th International Conference on Telecommunications and Signal Processing (TSP 2011)

Pages from

1

Pages to

5

Pages count

5

Full text in the Digital Library

http://hdl.handle.net/

BibTex

@inproceedings{BUT72986,
  author="Lukáš {Malina} and Jan {Hajný}",
  title="Accelerated Modular Arithmetic for Low-Performance Devices",
  booktitle="34th International Conference on Telecommunications and Signal Processing (TSP 2011)",
  year="2011",
  pages="1--5",
  isbn="978-1-4577-1411-5"
}