Přístupnostní navigace
E-application
Search Search Close
Publication result detail
HÁZE, J.; VRBA, R.; SKOČDOPOLE, M.; FUJCIK, L.
Original Title
SWITCHED - CAPACITOR ADC WITH LOW POWER CONSUMPTION - BEHAVIOURAL MODELLING
English Title
Type
Paper in proceedings (conference paper)
Original Abstract
A paper deals with 12-bit, low power switched- capacitor (SC) analog-todigital converter (ADC). Since the ADC will be used in portable applications the low power consumption is the key task for design. The paper focuses on block design of ADC and its behavioural modelling. The basic block topology design is also outlined. Techniques for avoiding of capacitor mismatch, clock feedthrough, finite gain and offset of Op-Amp etc. are utilized in the design.
English abstract
Keywords
A/D Converter, switched capacitors, low power, error correction, block diagram.
Key words in English
Authors
Released
01.12.2004
Location
Crete, Greece
ISBN
80-214-2819-8
Book
Socrates Workshop 2004. Intensive Training Programme in Electronic
Pages from
162
Pages count
6
Full text in the Digital Library
http://hdl.handle.net/
BibTex
@inproceedings{BUT11884, author="Jiří {Háze} and Radimír {Vrba} and Michal {Skočdopole} and Lukáš {Fujcik}", title="SWITCHED - CAPACITOR ADC WITH LOW POWER CONSUMPTION - BEHAVIOURAL MODELLING", booktitle="Socrates Workshop 2004. Intensive Training Programme in Electronic", year="2004", number="1", pages="6", address="Crete, Greece", isbn="80-214-2819-8" }