Publication result detail

Simulation and Prototyping Multiprocessor SoC with Hybrid Pipeline/Farm Architecture

KUTÁLEK, V.; DVOŘÁK, V.

Original Title

Simulation and Prototyping Multiprocessor SoC with Hybrid Pipeline/Farm Architecture

English Title

Simulation and Prototyping Multiprocessor SoC with Hybrid Pipeline/Farm Architecture

Type

Paper in proceedings outside WoS and Scopus

Original Abstract

Process- and thread-level parallelism is very often exploited inasynchronous processor pipelines for embedded applications, recently ona chip. The paper deals with simulation of pipelines with one or moreworkers in each pipeline stage. The number of workers can be adjustedto balance execution time of other stages so as to keep efficiencyhigh. Simulation-based prototyping of such pipeline processor farmsusing Transim tool can account for communication delays, multitasking,data-dependent variations in workload, CPUs with different speeds, etc.Simulation results for a given task divisible to a few subtasks ofarbitrary duration are presented as well as a particular example of apower of a matrix.

English abstract

Process- and thread-level parallelism is very often exploited inasynchronous processor pipelines for embedded applications, recently ona chip. The paper deals with simulation of pipelines with one or moreworkers in each pipeline stage. The number of workers can be adjustedto balance execution time of other stages so as to keep efficiencyhigh. Simulation-based prototyping of such pipeline processor farmsusing Transim tool can account for communication delays, multitasking,data-dependent variations in workload, CPUs with different speeds, etc.Simulation results for a given task divisible to a few subtasks ofarbitrary duration are presented as well as a particular example of apower of a matrix.

Keywords

Multiprocessor SoC, pipeline/farm architecture, performance prediction

Key words in English

Multiprocessor SoC, pipeline/farm architecture, performance prediction

Authors

KUTÁLEK, V.; DVOŘÁK, V.

RIV year

2011

Released

22.04.2002

Publisher

Faculty of Information Technology BUT

Location

Brno

ISBN

80-214-2094-4

Book

Proceedings of IEEE Design and Diagnostics of Electronic Circuits and System Workshop

Pages from

296

Pages to

299

Pages count

4

BibTex

@inproceedings{BUT9823,
  author="Vladimír {Kutálek} and Václav {Dvořák}",
  title="Simulation and Prototyping Multiprocessor SoC with Hybrid Pipeline/Farm Architecture",
  booktitle="Proceedings of IEEE Design and Diagnostics of Electronic Circuits and System Workshop",
  year="2002",
  pages="296--299",
  publisher="Faculty of Information Technology BUT",
  address="Brno",
  isbn="80-214-2094-4"
}